I am having trouble seeing if my truth table based on the exercise's instructions is correct (mostly because the instructions are really confusing me and the TA's explanation really didn't help, this is kind of my last resort). Instructions: > Consider a circuit that has a data input Data and a reset input Reset and a single output Z. The output Z should be asserted true (set to 1) whenever the string of 1s and 0s entered since the last assertion of Reset, when interpreted as an unsigned binary integer, is divisible by 5. Otherwise it should be set to false (0). Assume that the two inputs act independently, i.e., they can change at the same time. Also, approach this problem using a Moore machine, where the output Z’s value is associated with being in a particular state, and not with the transition itself. This will be explained further in class - the parity-checker FSM is an example of a Moore machine. Finally, use the following properties: > 1. If a%5=α and b%5=β then (a+b)%5=(α+β)%5. >2. If a current string has a numerical value of x then placing a 0 on the right hand side results in a string having a value x + x and placing a 1 results in a string having a value x+x+1. This is the truth table that I came up with: Q2 Q1 Q0 D R | Q2' Q1' Q0' Z 0 0 0 0 0 | 0 0 0 1 1 0 | 0 0 1 0 0 1 | 0 0 1 0 1 1 | X X X X 0 0 1 0 0 | 0 0 1 0 1 0 | 1 1 0 0 0 1 | 1 1 0 0 1 1 | X X X X 0 1 0 0 0 | 1 0 0 0 1 0 | 0 0 0 1 0 1 | 0 0 0 1 1 1 | X X X X 0 1 1 0 0 | 0 0 1 0 1 0 | 0 1 0 0 0 1 | 0 1 0 0 1 1 | X X X X 1 0 0 0 0 | 0 1 1 0 1 0 | 1 0 0 0 0 1 | 1 0 0 0 1 1 | X X X X where Q2,Q1,Q0 represent the remainder present state in binary form and Q2',Q1',Q0' represent the remainder next state in binary form. Inputs: D=Data, R=Reset. Outputs: Z (The X represents some next state that isn't important (from what I understood of the instructions) since D and R are independent.