I have a fairly simple application:

[![enter image description here][1]][1]

Q1 is a P-Channel MOSFET.  It had a flyback diode between drain and source (which is not illustrated here.)

Between ST1 and ST2 there is a 1k resistor to load the circuit by 5mA (BT provides 5V output.)

Unluckily, BT1 is providing negative voltage when it is turned off (-3V.)

I came across with this circuit by TI:

[![enter image description here][2]][2]

I have some question about this, and I couldn't really find answers:

1. What kind of MOSFETs are being used? (N or P channels?) I believe they should be P-channels, as their arrow is pointing out from them. However, in my diagram, the arrow is pointing towards the *source* while these are pointing towards the *drain*.
2. Is this only a drawing difference? In other words, which one of these two would be my Q1? The left one or the right one? (I believe right one based on the flyback diode.)
3. I can understand how this blocks reverse current when the *gates* are on GND. When they are opened up, I understand the right FET: current flows from source to drain (from left-to-right on the figure,) but what happens with the left FET? Why would current flow from drain to source in a P-FET?



  [1]: https://i.sstatic.net/vDEQE.png
  [2]: https://i.sstatic.net/SaLPr.png