There can be some confusion in the terminology, since in some cases the substrate (which is lightly p-doped in most CMOS ICs) counts as one of the "wells".
Single well process The two wells are (1) substrate and (2) (typically) N-well. You may define a single mask which tells where to implant N-type impurities. The regions exposed by your mask become the N-well, and everywhere else is substrate.
Twin Tub process (complementary) As suggested by Weste and Harris, we can use the complement of the N-well mask to create additional doping of the P-well beyond the substrate doping. This allows us to modify the doping of PMOS devices while having the simplicity of only one mask.
Twin Tub process (non-complementary) We can also use a separate mask to define where the additional doping should occur. This is more complex but has the advantage of allowing us to create "intrinsic" regions with relatively light doping which may be good for isolation.
Triple well process the three wells are (1) substrate, (2) N-well, and (3) Isolated P-well. You may define a single mask which creates the N-well as above, and then define a second mask to implant P-type impurities within the N-well to form the Isolated P-well.
Note 1: Single well and twin tub (complementary) processes are virtually identical from a designer's perspective. I might refer to either as a "twin well" process (perhaps incorrectly), which is the reason for the confusion in my original answer.
Note 2: Note that the diagram in your question depicts a triple well process, not either variety of twin tub.