From my [previous post](https://electronics.stackexchange.com/questions/727539/at25sf081-spi-flash-waveform-timing-verification), I think I understand correctly the electronics side of the [Read Manufacturer and Device ID Signal (Figure 11-1) Operation](https://www.digikey.com/htmldatasheets/production/1568138/0/0/1/at25sf081-shd-t.html). 

My current implementation of the operation on the FPGA does not return the expected response on the SO line - there is a discrepancy:

Instead of the expected response:

- hex: `1F`, `85`, `01`,

I am seeing:

- hex: `00`, `00`, `00`.

So now I want to narrow down the cause of this issue.

My hypothesis is that it is likely an issue with the Verilog implementation of the operation, as the issue seems unlikely to be a fault at the physical layer. 

Why? Because [the FPGA configuration is loaded to/from the first three 64kb of flash memory](https://www.robot-electronics.co.uk/files/iceFUNdoc.pdf), and when I try compiling and uploading the [customer example configs](https://github.com/devantech/iceFUN), the FPGA works well (buttons/leds are responding as expected). This suggests that the Flash and FPGA are at least able to communicate via SPI.

**Would I then be correct in deducing from these facts that _only_ thing that could cause this response discrepancy _is_ the Verilog implementation of the operation, and _not_ the physical hardware of the device?**