I am trying to connect FT2232H breakout board (http://www.digikey.com/catalog/en/partgroup/ft2232h-evaluation-board-ft2232h-mini-module/15377) to DE0-Nano FPGA board (http://www.altera.com/education/univ/materials/boards/de0-nano/unv-de0-nano-board.html) and use it in FT245-style synchronous FIFO. In general, everything works, but system is unusable, because I receive some bytes twice (usually, receive 10-15% more data than send).

FPGA is clocked only by FT2232H (60 MHz) and entire system is synchronous so I think this is happening because I connect these two boards with 10 cm prototyping wires which are not exactly suitable for frequencies this high and don't use any pull-up/pull-down/series resistors because can't figure out which ones should be used. I've tried to connect 100 ohm (50 — 300, as suggested on some forum I've googled) resistor in series of clock signal — it decreased byte repeat ratio but not entirely. Is it this or something else causing problem and how should I solve it?