Ugh. This again. The Ben Eater drawing is wrong - the feedbacks are crossed. [here's Ben Eater's broken version in Falstad][1] [![enter image description here][2]][2] Even with the ‘corrected’ drawing below, know that this is a *latch*, and it doesn’t work correctly. The output definitely does *not* toggle with J and K high. [try it here with Falstad. It oscillates][3] [![enter image description here][4]][4] tl, dr: It’s a junk circuit. Useless, except as a lesson of how *not* to design a latch. Why? When both inputs are ‘1’ the output oscillates during the time that the clock pulse is high. This is because the two NORs and ANDs form a pair of inverters wired head-to-tail. That, folks, is a *ring oscillator*, a useful circuit by itself, but not here. And finally, here's a correct JK flip-flop using a pair of latches (commonly known as "master-slave" or "edge-triggered" JK flip-flop): [JK flip-flop using a pair of latches][5] [![enter image description here][6]][6] The flop toggles as expected when both J and K are high. [1]: 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[2]: https://i.sstatic.net/G9GrKm.png [3]: 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[4]: https://i.sstatic.net/HwZ27m.png [5]: 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[6]: https://i.sstatic.net/h5R0Wm.png