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Synopsys Design Constraints (SDC) format is an industry standard to constrain integrated circuits for synthesis, timing, area, power etc.
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SDC Constraint for reset synchronizer
set_max_delay -to [get_pins -hierarchical *i_reset_bridge*|s_rst_sync_FF[*]|ACLR] 10.000
Quartus tells me that it cannot find any matching pins:
Argument <to> is an empty collection
Any hint on how to get my sdc …