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Results tagged with digital-logic
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user 194393
Digital electronics treats discrete signals, unlike analog electronics which treats continuous signals. Digital logic is used to perform arithmetic operations with electric signals and constitutes the base for building CPUs.
2
votes
Circuit that retains a state even after power loss
Single D-Flip-Flop
Single D-Flip-Flop with Preset and Clear
What about a low power (900nA, 0.8 to 3.6V) d-flip-flop powered by a coin cell when your circuit loses power?
It even has the edge detection …
- 9,639
2
votes
Multicycle Path
If we want the receiving flop to receive the new signal every 3 cycles, how is this ensuring that
The diagram shown doesn't ensure that. What provides this is whatever circuit is generating the "Ena …
- 9,639
2
votes
Accepted
Which K-Map is the correct one?
Both generate correct expressions but if by "correct" you mean the one which generates the most simplified sum of products: the second one.
The group of 4 will eliminate two inputs. The group of two e …
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1
vote
Accepted
In SystemVerilog, can two always_ff blocks be executed in parallel?
Both codes result in the same two synchronous devices (non-blocking assignments). It is understandably confusing that the language used in the literature uses words similar to what we use in software. …
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0
votes
Accepted
Hamming code error correction multiple bits
The decision to "only detect" or trying to "correct" the errors changes what you can do with 100% coverage:
if error correction is implemented, the code can correct (identify which bit flipped) all 1 …
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1
vote
Where does the first carry-in go on a adder/subtractor circuit?
The schematic is correct: with SUB set to 1 the 4 XOR gates invert all the bits in B and add one (carry in), thus computing the two's complement.
Besides any a errors at the breadboard connections, or …
- 9,639
1
vote
Is there an intuitive reason for why NAND gate is a universal gate?
I find De Morgan's laws very intuitive:
If you need A and B to achieve X, than, if you don't have A or B, you don't have X.
And you have the sum of products, intuitively: each AND detects a specif …
- 9,639
3
votes
Why is my Logisim circuit output xxxx?
Your AND and OR gates have floating inputs. Change their configuration to 2 inputs:
Also note that the adder and subtractor need a carry in input and, as Mat noted in the comments, the connection to …
- 9,639
4
votes
Logical output of CMOS circuit
Split your analysis between PMOS and NMOS switches:
Turning the NMOS switches ON: for the X node to be pulled to 0, P must be 1 AND Q OR R must be 1.
Turning the PMOS switches ON: For the X node to b …
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1
vote
simplify Boolean function F(A, B, C, D) = ∑ m(0, 1, 3, 4, 5, 7,8,9 11, 13,14,15)
Every minterm should be covered by the largest possible power of two area:
Which gives the final expression:
A'C' + B'C' + D + ABC
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1
vote
3-bit subtractor using full adders in logisim. Store results in a d-flipflop
Assuming the problem to be fixed is the bit length mismatch, you need to select each adder and change the "Data Bits" to one:
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4
votes
Why is this NAND gate not turning on with both inputs off?
Logisim (original or evolution) doesn't simulate the signal propagation with delay. Anything more complicated than SR latches may not work, as you have seen.
It works perfectly when connected to butt …
- 9,639
0
votes
Accepted
Microcontroller maximum and minimum source and sink current
on what parameter does the minimum and maximum sourcing and sinking current of a GPIO depend upon
It depends on the output resistance of the GPIO pin, which is not informed directly and may not be s …
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1
vote
How is sll implemented in MIPS?
The answer seems to be in the next slide after the one posted in the question:
This is not the MIPS ALU. It is a step by step approach taken in this class material to show the implementation of the o …
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1
vote
AND gate output stuck at low
You mentioned 10k pull-down resistors on the input but not pull-up resistors at the outputs:
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