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A Field-Programmable Gate Array (FPGA) is a logic chip consisting of an array of programmable logic blocks and interconnects that is configured by the customer after manufacturing—hence "field-programmable".

1 vote
1 answer
229 views

Retrieving samples from an FPGA using Ethernet

I have a Spartan 3 FPGA for implementing a specific kind of digital modulation. I read the output signal by UART and RS232 but the rate is too slow for following high frequency signals. …
CLAUDE's user avatar
  • 500
5 votes
2 answers
403 views

How to define a function in Verilog?

Consider the following Verilog code which takes a byte and specifies whether its first and second nibbles are equal to 9. module test(input [7:0] inp, output[1:0] out ); …
CLAUDE's user avatar
  • 500
0 votes
1 answer
2k views

Put a DAC at the output of FPGA

I have designed a circuit by System Generator to implement on FPGA. The output signal is a sinusoidal with changeable frequency. I need to read the output signal by oscilloscope. … I should put a DAC at the output since the output of FPGA is parallel and digital. I do not know how should I do this, since I am not familiar with DAC. My FPGA is Spartan3. …
CLAUDE's user avatar
  • 500
-2 votes
2 answers
113 views

giving a lower clock rate to circuit in system generator [closed]

I want to give a lower clock rate to my circuit in System Generator. Can any one help me in this manner?
CLAUDE's user avatar
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1 vote
1 answer
371 views

using the clock of FPGA in system generator

I want to connect the we pin of FIFO to the clock of FPGA, but I do not know how should I do it in System Generator. In another language how can I access to the clock of FPGA in System Generator. …
CLAUDE's user avatar
  • 500
1 vote
1 answer
393 views

An error in using FIFO block in system generator

I have designed a circuit in System Generator. I want to put a FIFO at the output before out gateway as shown in the below picture When I run it I face to the following error I should connect th …
CLAUDE's user avatar
  • 500
1 vote
0 answers
208 views

Calculating the frequency of CPM signal in System Generator

I have a circuit which has been designed by System Generator to be implemented on FPGA. …
CLAUDE's user avatar
  • 500