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Results tagged with spi
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user 4245
SPI is a low-level 3 or 4 wire serial bus interface with clock (SCLK), data in (MISO) and data out (MOSI). The fourth wire is a Slave Select to uniquely select a device on the bus. This signal is usually active-low. Slave Select, Chip Select, CS#, SS# stand for the same function, typically. Be sure to check the datasheet, though. The SPI bus is a *de facto* standard lacking the formal specification.
4
votes
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Address decoding
Let's start by labelling some bits of the diagram for easy reference:
Now we can define what the different labels mean.
A is HIGH if any of A8-A15 are HIGH.
B is NOT A
C is HIGH if either B or E …
- 56.4k
3
votes
Is it logical to use pull-up resistor on SPI Clock line
It makes no sense to add a pull-up to the clock since the only time the slave cares about what happens on that line is when you are actively doing an SPI transaction. …
- 56.4k
2
votes
Accepted
What mode (CPOL, CPHA) should a programmer of an AVR ATMEGA324PA use?
.
-- ATMega324PA Datasheet section 27.8.2
And Figure 27-12 is:
That looks like CPOL=0 / CPHA=0 to me (SPI Mode 0):
For CPHA=0, data are captured on the clock's rising edge (low→high transition … When programming starts it first places the pins in output mode and pulls the clock low to start the SPI sequence with a LOW clock signal (Mode 0). …
- 56.4k
4
votes
Microprocessors for multiple (~40) SPI devices?
One word of caution when you are using that many SPI devices on a single bus:
Input Capacitance.
That number of devices will put a massive amount of capacitance on the bus. … (Basically the input capacitance coupled with the output impedance of the MCU's IO pins form a low-pass filter turning higher frequency square waves into more like sine waves, which SPI doesn't like - …
- 56.4k
1
vote
Are SPI slave select lines hardware enhanced?
For more advanced protocols using the SPI hardware (most notably I2S) the SS pin is generally controlled by hardware. In the case of I2S it is often used as the LRCLK. … The SS pin is quite often specially linked with the SPI hardware in such a way that when running in slave mode the SS pin can automatically control reception of data, and even raise interrupts when it …
- 56.4k
6
votes
Accepted
SPI and word size - what happens with (say) 8 bit and 24 bit data from the same chip?
It doesn't. It just works in whatever data size you tell it to.
Typically that is 8 bits, though some can work in 16 or 32 bits for increased efficiency.
To transfer 8 bits you lower SS, transfer 8 …
- 56.4k
4
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How to test if my program for SPI communication is working correctly?
SPI not to raise the SS pin after transfer. … The SPI on the Due is a single SPI bus with multiple hardware SS pins. …
- 56.4k
1
vote
Accepted
How to configure the SPI pins(MOSI,MISO,sclk and SS) for ATMEL ATSAM3X8E?
SPI is an incredibly simple protocol. The main thing to remember with it is it's full duplex and synchronous. …
- 56.4k
3
votes
MCP3008 alternative
There are many many different ADC chips available. Most major IC manufacturers make them - TI, Analog Devices, Maxim, to name but a few. There's literally thousands of different ADC chips available. …
- 56.4k
3
votes
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LCD Display connection
That display requires you to send each frame as a frame in its entirety. You need to send the full pixel data for each and every pixel with all the right timing. Kind of like driving a VGA monitor.
…
- 56.4k
14
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Accepted
Is the SPI Interface just a protocol or actual hardware?
Also, in chips with DMA the whole SPI subsystem can be completely decoupled from the CPU to run with absolute minimal overhead.
By the way, "SPI Interface" is an example of RAS syndrome. … SPI stands for "Serial Peripheral Interface", so "SPI Interface" would equate to "Serial Peripheral Interface Interface". But I digress. …
- 56.4k
4
votes
AVR SRAM limitation
Most external RAM is SPI, which suffers from the same dual-bus problem you have already. That's not to say it's impossible to use. … Something like a chipKIT uC32 would give you 32KB of RAM, and multiple SPI ports, so you can both buffer a whole frame and use separate SPI ports. …
- 56.4k
4
votes
Communication between micro controllers - I2C, SPI, UART?
SPI and I2C are both normally master/slave protocols, though there are ways of "bending" them to be able to work either way around. …
- 56.4k
6
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SPI communication - bits per second vs Hz
SPI is a fully synchronous serial protocol. For every clock cycle one bit is transferred.
There is, therefore. a 1:1 relationship between bits per second and hertz. … A 20MHz SPI bus runs at 20Mbps. …
- 56.4k
2
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Problems connecting differential ADC to SPI chain
You're misunderstanding how SPI works.
In an SPI bus every device connects to MISO, MOSI and SCK (or as many of those as there are on the chip) in parallel. …
- 56.4k