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Double Data Rate describes a computer bus that transfers data on both the rising and falling edges of the clock signal. Often used to describe SDRAM access.

0 votes
1 answer
709 views

Memory address 32-bit

I'm working with a Zedboard and I'm printing to the screen memory addresses of consecutive 32-bit float numbers. So the print generates this: Result 0: 5374.557617 Memory is A000000 Result 1: 5474.6 …
João Pereira's user avatar
0 votes
1 answer
574 views

Understanding Address Map

From what I can tell, I have from 0010_0000 to 3FFF_FFF of DDR memory, which is 1 072 693 247 bytes and approximately 1 Gbyte of memory available to write into the DDR, correct? … I thought the Zedboard had only 512 Mbytes of DDR memory... Also, in that table, it says that I have approximately 2Gbytes (4000_0000 to BFFF_FFFF) of address available for PL. …
João Pereira's user avatar
2 votes
1 answer
493 views

Zedboard 512x512 matrices, % utilization problem

My objective is to read seven 512X512 float matrices from the SD card to the DDR memory (step accomplished already with each matrix occupying around 1Mb), then pass them from DDR to my custom IP block … (I'm doing this transition with AXI DMA block), normalize them innside the custom IP block and then output them to DDR memory (also with the AXI DMA block). …
João Pereira's user avatar
1 vote
1 answer
4k views

MM2S simple transfer gone wrong

I followed some examples and I already managed to make a big S2MM (stream to memory-mapped) transfer via an AXI DMA. However, now I'm trying the reverse, i.e. to make a simple MM2S transfer to a very …
João Pereira's user avatar