Search Results
| Search type | Search syntax |
|---|---|
| Tags | [tag] |
| Exact | "words here" |
| Author |
user:1234 user:me (yours) |
| Score |
score:3 (3+) score:0 (none) |
| Answers |
answers:3 (3+) answers:0 (none) isaccepted:yes hasaccepted:no inquestion:1234 |
| Views | views:250 |
| Code | code:"if (foo != bar)" |
| Sections |
title:apples body:"apples oranges" |
| URL | url:"*.example.com" |
| Saves | in:saves |
| Status |
closed:yes duplicate:no migrated:no wiki:no |
| Types |
is:question is:answer |
| Exclude |
-[tag] -apples |
| For more details on advanced search visit our help page | |
Results tagged with cmos
Search options not deleted
user 99426
"Complementary Metal-Oxide Semiconductor" is a process which implements a combination of PMOS and NMOS transistors. Most current digital logic is implemented in CMOS. Its cost-effectiveness due to being so widespread means many other applications have become common as well, such as in analog design, image sensors, telecommunication, etc.
0
votes
1
answer
105
views
What could be a good project to realize neural network in hardware (VLSI) for a beginner? [closed]
As a beginner how can I start implementing neural network using CMOS technology. I have come across implementing neural nets that mimic basic gates. …
- 147
1
vote
1
answer
480
views
What is the relation between noise margin and impedance in a CMOS circuit?
A well-designed CMOS inverter, therefore, has a low output impedance, which makes it less sensitive to noise and disturbances. …
- 147
0
votes
1
answer
1k
views
What does low-impedance mean in the CMOS inverter circuit?
For the CMOS inverter the text states "once the transients have settled, a path always exists between VDD and the output realizing a high output (“one”), or, alternatively, between VSS and output for a …
- 147
0
votes
1
answer
403
views
What does it mean to establish the state of the internal node in CMOS circuit?
This is the NAND circuit and the 'int' is the internal node of the circuit.
It is seen that A = B= 0→ 1 gives the worst delay in the below table. What does it mean to establish the state of the int …
- 147