I understand your signal will normally be at 5V and when an event occurs it will drop to 4V or less.
I would try this:
When the input is 5V the output will be 0V.
When the input is 4V or less the output will be close to 5V. If the output voltage isn't quite high enough you can increase R1 a little (try increments of 2K.)
The circuit assumes that the input ...
Since you are asking, WHY?
Assume you have 0 volts differential but different common mode voltage on the inputs.
You charge the input cap to 0 volts, but when it is switched from the input pins over to the ADC, the switches will cause different amounts of charge injection depending on the difference between the input pin common mode voltage and the ADC ...
Note: It does not look like a straight sinewave, but there is a noisy sinewave with peaks that might be due to saturation of transformer.
Alternative approach to RMS calculation in time domain: calculation in frequency domain using Fourier (e.g. FFT). It is more complex and the approach by @Marko is preferable if you need only RMS; if you want to play with ...
simulate this circuit – Schematic created using CircuitLab
HPF: High pass FIR filter of 20HZ , used to eliminate DC bias
X^2 : Squaring each sample
MAV: Collecting squared sample in a large Moving Average Filter
SQRT: Calculate square root of the entire MAV
100% is impossible unless you decided that was just less than the least significant bit or no contribution to SNR or unless the CM is very low to begin with. CM chokes rarely operate more than two f decades with design attenuation. So only at low freq, can you achieve this.
The irony of INA’s is when they have 110 CMRR from laser trimmed resistors, people ...
Usually the common mode rejection ratio (CMRR) will be specified in the datasheet. So far I have never seen one that was infinite.
If nothing else there will always be some slight common mode capacitance from input to output that will allow common mode noise to couple directly (and passively) into the output. No matter how good the silicon designer is.
A theoretical perfect differential ADC (or differential amplifier) will reject 100% of common-mode noise regardless of magnitude or bandwidth.
Now compare the CMRR specification on the datasheet of a real differential ADC.
Here is the typical rejection from the datasheet of the AD7675:
There is no guaranteed CMRR specification.
What kind of ADC noise is this?
Notice how there are apparently non-random "bands" of amplitude on that noise, around which many samples vary by only a small amount.
I have draw some lines on your original plot, to show them:
When I see this type of non-random pattern, the cause is not analog noise getting into the ADC, but is "digital" ...
Range is VREF in single and 2 * VREF in differential mode. If you use differential mode as pseudo-differential ( one input at a fixed voltage), you lose one bit.
About the picture (do not understand ? ) with resistors R4 and R3 , @ 250V ac, peak 400 Vdc).
Be aware that resistors are specified with a rating voltage (... 100V ?)... if you use SMD parts ... Verify that 2 resistors are enough.
Why not used a transmission throug nRF circuitry ?
All problems are resolved about isolation.
Am I correct in assuming that the TVS diode is there to clamp any
voltage spikes (e.g. for static charges being discharged)?
ESD is the primary reason why a designer would put a TVS on a conductor that a human could come into contact with.
What is the main purpose of the RC filter?
Filter out noise at 72kHz, but the resistance also provides current ...
There are TWO clocks that matter to that device, CNV (specifically the falling edge) and sclk.
Sclk is gated, and runs typically at either 55 or 110MHz, but is not particularly jitter sensitive, so a clock capable FPGA pin or even a ODDR register with the inputs strapped appropriately should be just fine there.
CNV is the 2MHz one that matters for this thing ...
You're lucky: body impedance measurements are a simpler problem than measuring external voltages in presence of noise. As long as you can keep the electrode-to-skin resistance relatively constant by strain-relieving the leads so they don't tug on the electrodes, it's not hard to get good signals.
The core idea is to drive a small AC current through the body,...
Fast = 4Msps Maximum. Slow = 2Msps Maximum. Actual performance depends on external input impedance.
From page 32 of STM32G474xB STM32G474xC STM32G474xE datasheet
4 Msps maximum conversion rate with full resolution
– Down to 41.67 ns sampling time
– Increased conversion rate for lower resolution (up to 6.66 Msps for 6-bit
Fast is a maximum ...
The slower channels are multiplexed paths that have a higher input impedance and capacitance (it's a farther length trace), which means the sampling capacitor takes longer to charge. Essentially it's the same ADC that is multiplexed to different inputs. If you go to RM0440 page 610 you'll see this displayed prominently.
Essentially, it's the same speed, but ...
There are three registers which configure the ADC in the PIC18F: ADCON0, ADCON1 and ADCON2.
A complete description of these registers may be found in section 19 (page 223) of the PIC18F4520 datasheet.
The ones I would make sure are set correctly are:
ADCON0.ADON -- this enables/disables the A/D converter module; make sure this bit is set to 1
ADCON1.PCFG -- ...
From the datasheet, "This module allows conversion of an analog
input signal to a corresponding 10-bit digital number"
So the variable that reads the register needs to be of the same data type.
Here ADCvalue = ADRES; ADCValue should be an 16 bit unsigned type (unsigned short or uint16) , you currently have is as a float.
Also, you read the value ...
There's a lot in there!
First of all, rather than set an absolute goal to maximise battery life, set a concrete target for battery life and dimension the battery and power budget accordingly. You may find that you don't need to worry about a 5mA continuous draw from the 10 pots.
Reading the potentiometers
There's more than one way to do this. ...
Let me answer this question:
3- How do compensate for lead wire resistance of my wires connecting my ADC to my potentiometer?
Your diagram indicates distances up to 1000 meters.
To transmit an analog signal over a long distance a 4-20mA current loop is often employed. Instead of a voltage level the signal is transmitted as a current between 4mA and 20mA. ...
Even if the original poster has solved this problem long ago, this sort of situation does come up frequently so here is my answer, over five years later...
This is similar to problem SLAC had when designing the "Z zero Factory" in the 1980s. Very narrow pulses would arrive from beam position sensors. Their amplitudes had to be digitized for use in ...
How about using a 3-resistor ladder at each point where you want to take a measurement, then you can measure the voltages on each side of the middle resistor and determine both the local supply voltage and the supply and return losses, which may be useful to know.
If you provide sufficient drive into the ADCs, this will work without problems.
In order to prevent the Sample-and-Hole HF noise from travelling along the shared path and into another ADC, you should add RC input filters to each ADC. But this is a good practise even without having multiple ADC inputs.
You might want to go check the datasheet more thoroughly.
I suspect you might be out of spec attempting to drive 3.850 volts with a Vdd of 5V (The TI datasheet for Voh claims only 3V Minimum and 3.8 Typical and Figure 29 suggests so as well). A quick test would be to increase the Vdd to 6 or 7V and see if that improves things.
If you must have 5V Vdd, you ...
There are a few mistakes.
Your intention is to measure the potentiometer wiper voltage. You've connected the wiper to A0, which is correct. But then it seems that you were tempted to close that circuit by connecting A0 to ground. Doing so is misguided: that will just short that entire branch of the circuit to 0V. You don't need to close that circuit because ...
I'm concerned that I've connected the unused A1, A2, A3 to ground
I'm concerned why you shorted the Pot to the ground ( along with A0).
When the wiper goes to V+, you will be shorting the LED between V+ and 0V without a current limiting R in series. Confirm cathode (-) on LED is on correct polarity.
you will get slightly better signal quality for > ~...
The things other people are saying in their answers are true. The regulator is likely dropping out and may eventually cut off, etc. But I think there is one more piece to the puzzle.
I have seen this before. The ADC data are wrong. Once the regulator drops out, VCC is no longer 3.3V. VREF for the ADC is also no longer 3.3V. So all the voltages you calculate ...
you're powering a device which expects 5V, there is an on board voltage regulator which uses that to create 3V3 for the chip itself. Hardware specs here. At 3V6 you are probably very close to the dropout voltage of the internal regulator. You only need to drop below the dropout voltage for the smallest amount of time (for instance caused by a momentary spike ...
There is probably no need. You don't need to perfectly recreate the battery voltage between those sampling points, and it's difficult to create high frequency information that would produce aliasing.
(Difficult : not impossible. You can connect and disconnect loads faster than once a minute, and see small voltage changes due to the battery internal ...
Sample at some higher rate and low-pass filter digitally. Do a study with sample rate as a free parameter; compare the component cost (and cost of the space taken) for the low pass filter vs. the cost of a microcontroller and ADC. Choose whatever's cheapest.
Assuming you have some calculation hw (computer or micro) you can use FFT or sine-wave fitting.
with FFT you calculate the angle of the fundamental you have applied for each of the four channels; for accurate results sampling must be synchronous, otherwise the real frequency will occur in between two bins (picket fence effect); in this latter case you ...
Both the ADS1263 and HX711 have programmable gain amplifiers in front of their ADC units.
The PGA on the ADS1263 can be set to x1, x2, x4, x8, x16 or x32.
The PGA on the HX711 can be set to x32, x64 or x128.
Other TI chips that have PGAs include: ADS111x, ADS1018, ADS124x.
If you want to sample at regular time intervals, then use a timer to trigger the ADC:
In ADC_regular_conversion, set external trigger to "Timer X Trigger Out event".
In Trigger output, set trigger event to "Update event".
And set the timer to the desired frequency.
The sampling time value in ADC is how long is the sample&hold ...