# Tag Info

## New answers tagged analog

0

Your question is over 1 year old, so you most likely have a solution already. If not, here is my advice:

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Everything you create in the IC layout contributes to a parasitic in some form. Each metal wire encounters inductance since current will create a magnetic field, and likewise metals near other metal will create stray capacitances. Pre-layout simulation cannot account for routing in this way (but it does account for the known capacitances of your FETs and ...

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Every conducting structure on an integrated circuit has capacitance, resistance, and inductance. You usually didn't ask for a capacitor or a resistor or an inductor, but they are present inherently. To perform an accurate simulation you must include the effects of these parasitic elements. The process of parasitic extraction is the estimation of these ...

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Practical experience often deviates from textbook ideal particularly in the analogue domain. If you're using good quality resistors from the same manufacturer and the same batch the accuracy between individual resistors is better than the quoted tolerance of the nominal value. If you are wanting a unity gain inverting op amp in practice using a general ...

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This is called a differential amplifier simulate this circuit – Schematic created using CircuitLab A constant current source draws a constant combined current through the emitters of transistors Q1 and Q2. If the voltage at V_in1 is equal to the reference voltage REF, and assuming that the transistors are identical, then the currents through Q1 and ...

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Connecting supply line to the ADC directly has other implications such as subjecting the ADC line to higher voltage than 5 V, possibly damaging the pin or the whole MCU. You can form a voltage divider using two resistors. Now you could accommodate chances of the external power input being higher than 5 V too. Connecting a small capacitor (100nF) ...

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Those are just junction dots like all of the others nearby, to show where 3 wires connect. This is called a Kelvin connection. The idea is that the connection should be as close as possible to the resistor. There are also some 4-terminal resistors made especially for this purpose. See Four-terminal sensing on Wikipedia for more information.

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It is a regular sense resistor with a kelvin connection or four terminal sensing. The dots are there to show a connection with the wires. A kelvin connection measures the current through the sense resistor for the DC to DC converter. Lord Kelvin is attributed for being first to use the technique to measure low resistances. It is important to make the ...

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I recently came across the "Parabolic Multiplier" circuit in a 1968 analog computer. To multiply A and B, you start with two op amps to compute A+B and A-B. Next, you need a function generator that produces X^2 (i.e. a parabola). With two function generators, you compute (A+B)^2 and (A-B)^2. You subtract the two results with an op amp, resulting in 4×A×B, ...

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For a current source the small signal impedance provided by it is ideally infinite. In case of transistor implementations, it is crucial which terminal we are "looking into" when we are defining the small signal impedance of the current source. If we use an nMOS between Vdd, and a node to which another MOS perhaps is connected, we would be measuring the ...

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The job of an ideal clipper is exactly that: clip. Any voltage exceeding a certain range is "cut back" to that range. Thus, it doesn't really matter what kind of signal you feed in. Note that just as any real-world signal, a real-world clipper has imperfections: Bandwidth: If you design a clipping circuit that works well for signals from DC to say 20 kHz, ...

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You could make your system compatible (not damaging) to ordinary networking equipment using the same method as used in power over Ethernet (PoE): (image source) You'd apply the 0-10 V signal to both lines of one signalling pair, and a reference ground to both lines of another pair. Then the transformer at the receiving end would block the 10 V from ...

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General rule of thumb is that 0-10V signals stay inside the electrical cabinet, and only 4-20mA signals leave the cabinet. This ensures signal integrity, since a low impedance current loop is more robust, and you know when there is no recipient anymore due to cable loss or unplugging. Since the minimum of 4 mA is not reached. Although it seems you are stuck ...

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It could be safe, but only if the 0-10V signal has a sufficiently high source impedance (which is probably not the case). The danger is that depending on how the connector is wired, the 10V could be applied differentially across an Ethernet signal pair. If the current isn't limited by the source impedance, this could easily burn out the Ethernet transformer ...

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Here's an LTSPICE simulation of Woodward's circuit done by someone on DIYAudio: Obviously R5/R5A represents the potentiometer. It's interesting (in theory anyway).

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If you connect a fixed voltage at the input, current will flow through the capacitor and then through the resistor, with a resulting voltage drop across the resistor, which is also your output voltage. But the capacitor is charging, and as it does, it opposes the input voltage, so the current decreases. This shows up as a decreasing voltage across the ...

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A differential is the mathematical expression for the rate of change. If the ramp rises with a constant slope rate the change will always be the same and therefore the output of a differentiator is a constant value when a ramp is present at the input.

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The first proposal deals with common-mode noise only on the first stage. It might be good enough, or might not, depends on your internal grounding. The second proposal is something like this: http://www.ti.com/lit/ug/tiducc9a/tiducc9a.pdf This is a high-quality front end for a DAQ system, maybe more what you're after. That said, you will need to re-arrange ...

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Here are two NMOS based analog muxes. I don't know how your resistor network looks like schematic wise, but I suppose you know how to glue it all together and make it work. So I'll leave that problem to you. Link to interactive simulation You can make a transmission gate (TG) by tying 2x NMOS's source and gate together. If the input lives between -5 V ...

3

This circuit will do squaring. I leave calibration, and temperature compensation, to you. What is the bandwidth? at 1mA input, the 2N3904 will have about 40pF Cbe (computed from Ftau). With 100 ohm resistors, thus 4nanosecond Tau on nodes, BW is about 40MHz. simulate this circuit – Schematic created using CircuitLab

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Have a look at MAX14589E. It guarantees the switches are in OFF state when there is no supply. https://www.maximintegrated.com/en/products/analog/analog-switches-multiplexers/MAX14589E.html

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I have redrawn the circuit below, to make it easy for me to analyze. simulate this circuit – Schematic created using CircuitLab The op-amp (negative) feedback ensures that its inputs (nodes N1 and N2) are at the same potential (assuming gain is very high). Thus, assuming a current $I_c$ flows through Q1, potential at node N1 (same as at node N2) is:...

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Easiest way to go from analog input to PWM output? https://www.st.com/en/power-management/pwm-controllers.html#2 https://www.maximintegrated.com/en/app-notes/index.mvp/id/4502 https://www.ti.com/lit/ds/symlink/tl5002.pdf Above linkS will help you.

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Anyone who knows an IC for this? Yes, I do: -

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RG2 is only there to make the circuit symmetrical so that input bias current of the amplifier cancels out. From the current through the sense resistor to the load, there is a voltage drop such that the right hand side of the sense resistor is at a lower potential than the left hand side. The op-amp drives the BJT base to equalize the voltage at the lower ...

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You could use a device like the TI TPS25940A eFuse to improve the circuit. It has current ramp rate control for cap charging and programmable current limit. This particular part has a minimum current limit of 0.6A it looks like. But you can probably find a similar part with lower current specs. It will be cheaper too. The eFuse voltage drop should be very ...

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just connect both... simulate this circuit – Schematic created using CircuitLab So long as you are not doing charlieplex the LDR circuitry will not be disturbed by your LED multiplex, and the LED multiplex will not be disturbed much by the LDR.

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You need to subtract the squares of the RMS voltages then take the square root to obtain the noise of the source. However, this is only accurate if there is no coherence between sources.

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The article says:- Positive feedback from A1's output to P's CCW terminal results in constant current drive to the pot... the differential voltage seen by A3... From this I figure that each half of the pot is driven with a current proportional to the input signals. The voltage across each half is proportional to its resistance, so as the pot is turned ...

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Perhaps a simple example with real numbers may help to explain the difference: Lets assume that for high gain we need a dynamical collector resistance of rc=20k. In case of an ohmic (passive) part we have rc=Rc=50k with a DC drop of 20V for Ic=1mA. In many cases, this is unacceptable (Large supply voltage). Using a BJT as an active load it is not a problem ...

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FET's are voltage controlled Resistors according to (Vgs-Vt) over the range of Vds to sink current from Nch Enhancement mode FET's when used as open-drain loads to a power source. The resulting Rds is not inverse linear with gate voltage but can be made linear with feedback. BJT's are exponential Vbe controlled current sinks or with a base resistor, ...

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If you use a resistor as a load, then its slope resistance (change in voltage drop / change in current through) is equal to its resistance. If it's being used to bias an amplifier, then its voltage drop is given by the bias current times the resistance. If you want a higher slope resistance, then you have to suffer a corresponding higher voltage drop at any ...

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Active loads are used because transistors are cheaper and easier to make on a silicon die than resistors are. Therefore, you find active loads more in integrated circuits while discrete circuits tend to use resistors more for simplicity (and less availability of matched transistors). I cannot understand why dc voltage drop across them is lesser ...

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In a previous project I worked on, we built, tested and used precision voltage sources for Penning trap experiments. We needed $100\,\text{V}$ sources to be stable (i.e. precise, not accurate) in the sub-$\mu\text{V}$ range. One problem with 8.5 digit multimeters and measurements at that level is that you have to deal with thermal potentials and ...

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The thing you want to avoid if possible is to have your signal paths cross reference plane voids. You will also want to bypass both v+ and v- to ground, since you’re driving signals referenced to ground (SMA connector shield). Try adding bypassing and see how that works out. That said, approach (A) is more what I would choose.

-1

The best practice for analog circuits is to reduce the loop area of the signal and its return path and keep the impedance as low as possible. WHen not possible then the impedances must be balanced to reduce the common mode noise becoming differential. When there is no circuit noise or ambient noise, with low impedance there is no need for a ground plane. ...

11

Aside from the matter of need and accuracy from what I understand, there are two other issues: Leakage and noise. If you go to high voltages (e.g., measuring 100 volts to 9.5 digits) you run into leakage issues: the voltage causes tiny currents to flow between lots of different points (e.g., between the positive and negative terminal cables in a coaxial ...

29

Four reasons: Because modern meters have an autoranging function. Because the dynamic range of the analog system would not support 91⁄2 digits, with a range of 1 V the noise floor would be in the nanovolts (you can't get lower than nanovolts because of thermal noise, without significant cooling of what your measuring to reduce the thermal noise ...

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Putting aside the signal-processing challenges, let’s examine some noise floors. A 62 ohm resistor produces 1 nanovolt/rtHz RMS noise at 290 Kelvin, and ignoring various crystal-flaw contributors, some of which are current-level dependent and may boost that nanovolt by orders of magnitude. So we have a 1 nanovolt random noise floor, in a 1 volt input ...

5

Probably, there is a need for it, but not a big need. Not many people need that much accuracy, only some high end companies who probably make machines having also that much accuracy (for the parts that need to be measured with a 9.5 digit DMM). However, I can imagine there is a 'need' for it, or at least a wish. The reason why there are none, is that it is ...

1

The capacitor will charge to the voltage you have on the load (including the wiring). The resistor R1 will create an additional voltage drop (that's the whole purpose of a shunt resistor). So on the right side of the resistor you will have the load voltage $V_{load} = V_{C1}$ and on the left side of the resistor you will have $V_{load} + V_{R1}$. This ...

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The GPIO pin of your micro-controller is an high-impedance input. It will allow little to no current to flow through the circuit. On average, the capacitor will not let the current go through either. As drawn, your circuit will only measure the current used to charge or discharge the capacitor, a pulse that will last: $$\tau = R \cdot C = 150 ns$$ (the RC ...

5

Since your guitar string can only produce a handful of pitches, a full FFT is wasteful. Take the lower E string. The tones are approximately 5Hz apart. Assume a sampling rate of 11025 Hz. To get your FFT bins spaced closely enough together, you will need an FFT length of at least 2048 resulting in 1024 bins. You calculate 1024 bins, then discard 1000 ...

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There isn’t enough information in 10 mS of sampled audio to reliably tell the difference in frequency between a low E and a low F or D# notes. 10 mS is barely more than 1 full pitch cycle at those low frequencies, and there’s tons of non-pitched noise from the attack (pluck or strum) interfering with any measurement of the rate of phase change of the higher ...

1

For simulation, just put the DC and AC sources in series. Done. For the real circuit, do you have access to the 36V supply feedback network? You could inject the ripple there and let the power supply do the heavy lifting for you. Another approach would be to put an LDO in line with 36V and inject ripple in the LDO's feedback network. You would have the LDO ...

1

For simulation, just connect the two voltage sources in series. You can do the same with the AC source directly, as vangelo says, but it's more obvious on the schematic if you do it with two voltage sources. For a real circuit you can do the same if at least one of your voltage sources is not grounded. If the voltage sources are grounded, then you could ...

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Does anyone have any idea which way I should go here? Consider initially the 3 op-amp amp Instrumentation Amplifier (InAmp): - Gain is set by one resistor ($R_{gain}$) and, if you throw away the final stage op-amp circuit and take your differential output directly from the two op-amps to the left you should get what you want. You do need to spend a ...

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Other factors for voltage divider and other biasing circuits can be obtained following a similar procedure. Hope it helps.

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The best practice would be to use the low impedance 5V supply and not add another DC-DC noise source but to use RLC filters to attenuate to the required level and isolate analog and digital ground paths from source. Start with a spectral and current specification e.g. xx mA, LPF -3 dB @ ? kHz, -100 dB @ ?? kHz then design an Nth order RLC passive filter ...

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