23
votes
Can we say that a CPU is an ASIC that is designed to perform a wide range of instructions?
An ASIC is a tailor-made suit, normal chips are ready-to-wear.
Being a CPU doesn't disqualify a chip from being an ASIC. Being a general-purpose one designed for a wide market does though. Every ...
- 12.5k
20
votes
Can you get a Passive ASIC?
Not an expert answer, but some disconnected relevant facts:
One of the reasons that ICs often require external passives is that standard silicon ICs are not a good substrate for making capacitors and ...
- 7,454
16
votes
Accepted
Are FPGAs for experimentation alone?
I also read an article that they are used for testing purposes alone.
That is so ridiculous that I think you misunderstood the article. FPGAs are used for various applications, including data ...
- 15.2k
16
votes
How were custom chips designed in the days prior to the arrival of FPGAs as hardware emulation devices?
We still release final RTL (* see below) based on simulation alone (simulators by Cadence, Mentor). All functional tests are covered in RTL simulation, some are promoted to gate level simulations. ...
- 3,097
13
votes
Accepted
What are Soft, Firm and Hard IP Cores?
At least from an FPGA standpoint, hard IP refers to features built into the silicon of the FPGA itself. These can range from mixed signal components such as clock management components, PLLs, and high ...
- 40.7k
12
votes
Can you get a Passive ASIC?
ASIC means Application Specific Integrated Circuit. If that integrated circuit would contain only passive components then we could still call it an ASIC.
Making a silicon die with only passive ...
- 80.2k
12
votes
Accepted
How is clock gating physically achieved inside an FPGA or ASIC?
Is it a bad idea to gate clocks? It depends.
In the ASIC there’s well-understood timing for clock paths, so it’s reasonable to instance a standard cell on the clock tree to gate a sub-region’s clock. ...
- 50.1k
11
votes
How much does it cost to have a custom ASIC made?
Now by end of 2018, a company is working on a platform "Itsy-Chipsy" (assuming a software tools collection plus fab services) to produce two prototype chips for about $400 at a 350x350um size which ...
- 535
11
votes
Accepted
How does the switch in this board control four different states in the LED?
How does 1 button generates 4 states (from my point of view it should be on/off)?
The chip under the black epoxy "bubble" has an oscillator and a state machine that implements this ...
10
votes
Accepted
Are there fully open-source ASICs?
Short answer: No. It is not a precedent.
There are plenty of Open Source RTLs out there. OpenCores and OpenSPARC are examples, but I know of international academic projects that at the very least ...
- 8,366
10
votes
Accepted
Is an ethernet switch considered as an ASIC?
ASIC means 'Application Specific IC', and that device is very application specific. If you want to build a 4 port Ethernet switch with it, it will do it, and only that. So yes, you need to use the '...
- 159k
10
votes
How is clock gating physically achieved inside an FPGA or ASIC?
It is bad idea to add logic gates in clock signal path.
Do not add logic gates to your signal path. Strategically placed clock-gating and clock-divider are sometimes exceptions, but should be used ...
- 4,280
9
votes
Is it good practice to always assign initial value and reset signals in digital design?
I would say that there are a couple of different ways that you could argue that. Not sure what the 'best' method is in general, it's going to be dependent on what you're trying to accomplish. It's ...
- 40.7k
9
votes
Accepted
What is the difference between regular FPGA boards and FPGA boards for ASIC emulation?
I think the differences can be boiled down into a few key points: First, boards that are designed for ASIC emulation can have several, very large FPGAs that usually provide mostly pure fabric logic ...
- 40.7k
9
votes
How were custom chips designed in the days prior to the arrival of FPGAs as hardware emulation devices?
Simulations were done. Designers used SPICE as well as various, often proprietary logic simulators.
You shouldn't think that every chip works perfectly the first time it is manufactured. These design ...
- 31.2k
8
votes
Is it Possible to Design an Entire Operating System or App using ASIC Chips?
There are so many wrong statements and assumptions that I don't even know where to start.
So let's start with my credentials: I have been designing ASICs for 25 years. I have done small, medium and ...
- 14.2k
8
votes
How were custom chips designed in the days prior to the arrival of FPGAs as hardware emulation devices?
TTL lash-ups, functional simulators, logic simulators, and large budgets for minicomputers to run these things were the norm before FPGA acceleration and prototyping were a thing.
The introduction of ...
- 50.1k
8
votes
How is clock gating physically achieved inside an FPGA or ASIC?
It is bad idea to add logic gates in clock signal path.
In an FPGA, not only is it a horrible idea, the design software should not let you do it.
how does it prevent glitch in the output signal i.e ...
- 60k
7
votes
Accepted
Advantage of clock enable over clock division
There are several advantages to this methodology that I can think of:
Clock Network - Firstly you only have one clock rather than three. This means that there is less competition for global and local ...
- 63.6k
7
votes
Beyond liquid helium cooling
Short Version
There are several methods of cooling below -269°C, but they won't be much use for overclocking a commercial CPU, because coolant temperature isn't everything.
Cooling Options
Instead ...
- 12.2k
7
votes
Accepted
Can an FPGA/ASIC have an operating system?
Well, you can use without doubt an FPGA without software, in fact many are used to support booting more complex systems (power sequencing, for example). But you can also define some kind of embedded ...
- 8,231
7
votes
Accepted
What ASIC/MCU is in my keyboard?
The assembly is likely done as a 'chip on board' to save cost. There's nothing evil about that - it's a very common technique in consumer electronics.
How to ID the chip then? Ask the USB interface ...
- 50.1k
7
votes
Can we say that a CPU is an ASIC that is designed to perform a wide range of instructions?
Strictly speaking, a chip qualifies as "ASIC" (Application-Specific Integrated Circuit) when it's made for a specific application for a specific customer for their internal use, an "...
- 6,389
6
votes
Exotic semiconductors for fast digital ASIC
I'll bet that you don't want raw speed, but speed per dollar, and operations per Joule. In which case, silicon CMOS, because of the huge investment in it, is the 500lb gorilla you should go with.
- 159k
6
votes
Beyond liquid helium cooling
Liquid Helium is a very poor coolant unless you really want to go to absolute zero. It's heat of vaporization is very low compared to LN2. Reading through the table of the gases, you might find liquid ...
- 13.4k
6
votes
Hardware to run a fixed neural network
To give a rough idea my network has around one million neurons and ten billion connections.
That means ten billion weights. From a NN perspective, this very much sounds like you want to apply L1 ...
- 88.8k
6
votes
Can an FPGA/ASIC have an operating system?
You can put a soft processor into the FPGA logic, and there are a lot of FPGA parts with integrated hard processors, these processors are running software, so can and in a lot of cases do run an OS.
...
- 4,499
6
votes
Accepted
Whats the cost to create your own custom ASIC chip?
An FPGA would be my first choice. FPGA logic design requires specialized skills if done properly. This could be done for under $5000 for a prototype (parts and a circuit board) if you do the PCB ...
- 7,769
6
votes
Synthesis rules for this procedural assignment (combinational circuit)
a = -a ;
a = a << 1 ;
Both these statements inside the combinatorial always block are not valid for synthesis at ...
- 10.8k
Only top scored, non community-wiki answers of a minimum length are eligible