# Tag Info

## Hot answers tagged astable

20

The granularity of the light sequence suggests a 555 oscillator period of 0.1 seconds (10 Hz). From there, it is a matter of counting and decoding: simulate this circuit – Schematic created using CircuitLab

17

The obvious answer here is to not even try to do this with evil 666 555 timers. You want three signals that need to be kept in phase, and one of them is a double pulse. While this could eventually be accomplished with a mess of 555 timers, it is actually quite simple to do in firmware. All you need is a micro with 3 outputs. Even the tiny PIC 10F200 can ...

12

If you understand how an astable multivibrator works, you can get to see how this one works, except that instead of going back and forth it actually goes "in a circle". First of all, there should be a resistor between each LED and the drain of its MOSFET, while the 1M resistor would remain connected directly to the drain (I've drawn the circuit below with ...

9

Good question. First off, the polarity of the capacitors in your picture is the wrong way around. The + terminal should not be connected to the base of the transistors. Why the circuit works (when the capacitor polarity is fixed in the drawing): The base of the transistor will always be around 0.6 to 0.7V above ground (because the base-emitter junction ...

8

what the equation is to find the 555's output frequency is, when a control voltage is applied to pin 5 By my calculations, the accepted answer and the formula echoed in the question are wrong. I believe the correct formula for frequency when a control voltage is applied is: $f = { 1 \over C \cdot (R_1 + R_2) \cdot ln({1 + { v_{cont}\over {2 \cdot ( v_{... 8 Yes it does. Reducing the oscillation frequency$f_{osc}$will have an impact on your circuit power consumption, because you'll be charging and discharging the capacitor less frequently, thus reducing consumption. If you also want to reduce the current drawn by the 555 itself, then the first thing you should look after is lowering the supply voltage$V_{...

8

This is essentially three inverters connected in a ring fashion to make an oscillator. More about ring oscillators here: https://wiki.analog.com/university/courses/alm1k/alm-lab-ring-osc But the lack of current-limiting resistors on the LEDs is worrisome to say the least, and it probably would not work without them. EDIT: so I drew this thing as-is, added ...

8

First, at some point the power must be turned from on to off. Second, in the real circuit the capacitors won't be exactly 10.000 uF (or exactly equal to each other) and the collector resistors won't be exactly 47.000 kohms (or exactly equal to each other). (And the BJT's won't have exactly the same $\beta$ and the LEDs won't have exactly the same forward ...

7

As has been mentioned, Pin 4 should be connected to +V and also pin 5 decoupled to ground by about 10nF. The 555 should not get hot at all! This is the big clue. I've played with this circuit and I found that you could blow the 555 easily by accidentally reversing the power supply. Did you do this or plug in the 555 the wrong way round at some point? It'...

6

Add a 4.7uF capacitor from pin2 (top end of 10uF) to vcc reduce the timing resistors by one third. this way the capacitor pair will power up as about 1/3 VCC and the pulses will go from there all coming out at about the same size,

6

If you give the op-amp even a tiny bit of offset voltage when you connect the uncharged capacitor the output will slam to one rail or the other and oscillation begins. Similarly, even if perfectly balanced on knife-edge, a microvolt of change in offset voltage will be amplified by perhaps 1,000,000 and the output again saturates, since that 1V becomes 500mV ...

5

If you mean in A-stable multivariate circuit of 555, considering the block diagram of IC: and the circuit of A-stable: Voltage of C changes periodically between $V_{CC}/3$ and $2V_{CC}/3$ which are the reference voltages of upper op-amp and lower op-amp. So if you change the reference voltage of upper op-amp by $CTRL$, then voltage of C changes ...

5

It looks like you have a dead short across R2 — the connection "dots" at either end are a giveaway. Remove the extraneous wire, and it should start working.

5

Try this: - R1 dictates charge time of C1 and R2 dictates the discharge time. Or this: - Taken from here Alternatively put a d type flip-flop on the output to divide the frequency by two and deliver a very good 50% duty cycle.

5

Because the delay around the loop must be 360 degrees (why? Because the output at the junction of R3/C3 is identical to the input of the first inverter), it's clear that the phase shift of each section must be 120 degrees. And since this represents the sum of the RC phase shift plus the 180 degree phase shift supplied by the inverter, the RC phase shift must ...

5

So the output of vibrator is a pulse which should be the input of the integrator as to gain the triangular waveform. In your simulation R6 =1 milliohm instead of 1 Mega. You are basically shorting the integrating capacitor. The correct symbol for megaohm = Meg in LT spice. EDIT: As Bimpelrekkie mentioned, since you have a open-loop system your op- amp ...

5

The LED flat edge cathode is not towards gnd. So it is backwards. the leads are also stressed beyond recommended in spec.

5

This is easier if you don't stick to the original schematic. One capacitor is ten times the other.

5

The uncharged cap should not create any change in the difference of voltage between inverting and non inverting inputs that the op-amp could amplify, so I would expect that in a perfect simulation this circuit would not start oscillating in the first place unless the capacitor does hold a tiny bit of charge. You are correct and there are many questions on ...

4

First all below concerns only CMOS gates with switching point at 1/2 of Vcc. So, not HCT series. HC series are OK and 4xxx too. At first, R1 does not affect the frequency at all. It is placed there in order to make the input current of the inverter (through the protection diodes) to not affect the work of the schematic. That is why it should be much bigger ...

4

Pulling Reset to ground will ensure that the output is held low.

4

The right hand op-amp looks like a comparator (with an open collector output). The emitter I suspect is pin 1 and this is tied to -15 V. Open collector outputs require a pull-up resistor hence the need for R5 in your circuit. If you could link where you found this circuit this could be confirmed. I think the comparator matches the pin out of the LM311: - ...

4

There a few problems with your circuit: 1) The second stage will generate an exponential rather than a triangle. 2) The resistor values for feedback on the second stage are much too low - the amplitude may be limited by the output current capability of the 741. You can use something in the range 10k-100k. 3) The actual amplitude of the output will be ...

4

pin 5 of the 555 is "control voltage" a tap on the divider chain that sets the levels for setting and resetting the internal flip-flop. without a capacitor there the thresholds will tract the supply voltage exactly ad a glitch on the supply (a brief spke or dip) would cause the threshold to move leading to early triggering of the flip-flop - so ...

3

"which will eventually become an SMPS" Unless you are thinking of low voltage and low current, DONT TRY TO BUILD YOUR OWN SMPS. "If I only supplied one voltage divider, every time a transistor turned on all the current would be sucked to ground." I can't imagine what you are talking about, which even more convinces me that you should not be building an ...

3

The calculated frequency (datasheet equation) for that configuration is about 195kHz. The calculations are invalid, however, since the bipolar version of the 555 (NE555) only barely works to 100kHz. You can try the CMOS version (eg. TLC555) which will work fine at that frequency. You might want to consider increasing the resistor values somewhat (maybe 3-...

3

If you use a 4001 (quad 2 input NOR) you could use 2 gates for your latch circuit and one of the remaining gates to synchronise control with the LOW output state of the 555. This avoids the production of spikes (short pulses) at the output of the 555. The NOR gate SR circuit would normally have a HIGH on the Q output. This forces the control gate output LOW ...

3

The diodes are the problem. As modified, the circuit has a stable state, with both transistors turned on, and about 0.7 volts on both sides of both capacitors. Consider that the circuit was turned off for "long enough" for the caps to discharge to zero. When you apply power, the caps start out at zero, and R2, R3, R4, and R5 all follow the power rail as it ...

3

simulate this circuit – Schematic created using CircuitLab The time when the output is high is $T_H = \tau_1ln(1-$ $V_C\over 2Vdd - Vc$) (it charges from $V_C/2$ to $V_C$) The time when the output is low is $T_L = \tau_2 ln(2)$ (it discharges from $V_C$ to $V_C/2$) frequency is f = $1\over T_H + T_L$ Where \\$ \tau_1 = (R1 + ...

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