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Sizing transistors for a CMOS circuit?

This method can be used as a shortcut for finding the size easily. So here for the pmos circuit the maximum worst delay that can be generated is by having three transistors in series. so that may be ...
Jeya Surya's user avatar
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Symmetric (4 terminal) MOSFET Turn-on Voltage Relative To What?

The turn-on voltage is still Vgs (gate relative to source). It is the source and drain themselves that swap spots depending on how the transistor is biased. For an nFET, the N-implant region at a ...
nanofarad's user avatar
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Cascode current mirror transistor biasing

Assume M0 & M3 are similar transistors of the same size Assume Iref = Iout hence VGS0 = VGS3 (assuming both M0 & M3 are in saturation) M0 & M3 have the same gate voltage. So, we can ...
sai's user avatar
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Cascode current mirror transistor biasing

If all the FETs are equal sizes, they will have equal VGS. in your 2nd circuit, V(x) is VGS of M1 with current IREF. Since M0 runs the same current, it will have the same VGS, so V(N) = 2*V(x). Since ...
jp314's user avatar
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