100

It's often said that 0's and 1's are represented by voltage, if the voltage is in the interval [0, 0.9), then it is a 0. If the voltage is in the interval [0.9, 1.5), then it is a 1 (voltages may vary, I'm only giving an example). To some degree, you've mostly created this problem by using an unrealistic example. There is a much larger gap between logical ...


77

You are getting confused. Look at TTL for example: - A low input level is between 0 volts and some small value above 0 volts (0.8 volts for the case of TTL). why do we take the trouble to set the 'low' to any positive voltage at all? We take the trouble to ensure it is below a certain small value. Picture from here.


73

In order to get non-inverting operation for logic (i.e., AND or OR vs. NAND or NOR), you need to operate the transistors in common-drain mode, also known as "source follower" mode. Among the problems with this mode for logic: There is no voltage gain. After more than a few stages, the signal is down to nothing. There is a significant offset (called the ...


69

There are two main reasons for the rise of serial 1) It's possible. Low cost transistors have been able to manage GHz switching for a decade now, long enough for the capability to be used and become standard. 2) It's necessary. If you want to shift very high speed data more than a few inches. This distance starts to rule out mobo to PCI card links, and ...


68

There are other factors that contribute to the speed. Memory: Actual performance is often limited by memory latency. Intel CPUs have large caches to make up for this. Microcontrollers usually don't. Flash memory is much slower than DRAM. Power consumption: This is often a big deal in embedded applications. Actual 200 MHz Intel CPUs consumed more than 10 ...


65

We can't. We are just decreasing the probability of errors by adding checks to the data. Depending on what type of data is to be checked, it can either be done via hardware or software, and can take any form from simple checksum bits in serial streams to cyclic state machines allowing only specific transitions to be made at any given time. But it's a ...


51

The logical blocks and memories can be made out of only transistors. The important question is: are all of the circuits on CPUs logical blocks and memories, or is there anything else? The answer is, there are always some other circuits. Here are some examples: ESD protection circuits often uses diodes and resistors Internal bypass capacitors: actually ...


50

First, as Keelan's comment and Turbo J's answer point out, the measurement was 113,093 Dhrystone MIPS not native MIPS. The Ivy Bridge microarchitecture of the i7 3630QM can only commit 4 fused µops per cycle, though it can begin execution of 6 µops per cycle. (The number of fused µops in a trace of code is roughly equal to the number of instructions; some ...


46

You are confusing the "ideal" value with the valid input range. In usual logic, in ideal conditions, the logical zero would be precisely 0V. However, nothing is perfect in real world, and an electronic output has a certain tolerance. The real output voltage depends on the quality of wires, EMI noise, current it needs to supply etc. To accommodate these ...


45

Fundamentally, all circuits are analog. The problem with performing calculations with analog voltages or currents is a combination of noise and distortion. Analog circuits are subject to noise and it is very hard to make analog circuits linear over huge orders of magnitude. Each stage of an analog circuit will add noise and/or distortion to the signal. ...


43

The approach which you show is quite an old topology for motherboards - it predates PCIe which really puts it back somewhere in the '00s. The reason is primarily due to difficulties of integration. Basically 15 years ago the technology to integrate everything onto a single die was virtually non-existent from a commercial standpoint, and doing so was ...


38

This possibly answers the title of the question, if not the body: Floating point addition requires aligning the two mantissa's before adding them (depending on the difference between the two exponents), potentially requiring a large variable amount of shift before the adder. Then renormalizing the result of the mantissa addition might be needed, ...


37

This CPU has... 2 cores A 32-KB instruction and 32-KB data first-level cache (L1) for each core Since there are two cores, we can expect the benchmark to run two threads in parallel. Their website gives remarkably little information, though, but if we look here, CPUs with more cores seem to give correspondingly higher L1 throughputs. So I think what is ...


34

You're mixing up implementation technology with colloquial terms for functionality. CMOS - Complementary Metal Oxide Semiconductor - is a method of making logic and related circuitry using both N-Channel and P-Channel field effect transistors. One of its defining characteristics is extremely low static power consumption - power is almost only used when ...


33

Single event upsets are no longer a thing of space nor aircraft; we have been seeing them happen on the surface for over a decade, maybe two by now. As mentioned though, at least in space applications we deal with upsets using triple voting (each bit is really three, and a two thirds vote wins, so if there is one that changes the other two will cover it.). ...


31

You're using those terms wrong. "Computer organization" is a rarely-used term for the microarchitecture, and "computer architecture" is a superset of that. Integrated circuit IP blocks come in two basic forms: A soft macro is the RTL (VHDL or Verilog) that describes the functional implementation of the IP. This is compiled into a gate-level netlist, which ...


30

Are 8051 and other low-bit microcontrollers still in use today? Yes, nearly everywhere. They're small and easy, there's a lot of cores floating around that you can put into your custom silicon at low or no cost, there's mature compilers. This all makes the 8051 still one of the most popular core architecture amongst silicon manufacturers. ARM cores might be ...


30

Why there are no widespread system communication protocols that heavily employ some advanced modulation methods for a better symbol rate? If the basic copper connection between two points supports a digital bit rate that is in excess of the data rate needed to be transmitted by the "application", then why bother with anything else other than standard ...


29

@peufeu's answer points out that these are system-wide aggregate bandwidths. L1 and L2 are private per-core caches in Intel Sandybridge-family, so the numbers are 2x what a single core can do. But that still leaves us with an impressively high bandwidth, and low latency. L1D cache is built right into the CPU core, and is very tightly coupled with the load ...


28

Everyone can edit source code at home, very few people have a chip fabrication plant to knock out a couple of custom chips. Bytes are free to create and distribute, materials are not. There's also the issue that source code is portable, and although CAD files etc. are sort of portable, there's a lot more overhead & errors & setup cost wasted ...


27

I think you have to look at it the other way around: CPUs are made with steps (implantation, lithography, etching, deposition of materials). If you design the steps and layers a certain way you get a CMOS couple (N-type MOSFET on the left, P-type MOSFET on the right), useful for making inverters and then start the whole logic thing, to eventually build all ...


26

A major underlying technical reason for the slow speeds is that cheap/small MCUs only use on-chip flash memory for program storage (i.e. they don't execute from RAM). Small MCUs generally don't cache program memory, so they always need to read an instruction from flash before they execute it, every cycle. This gives deterministic performance and #cycles/...


24

Why do people ride a bicycle or a small motorbike, when you have a Formula 1 car? Surely it must be better to drive say 300 km/h and get everywhere instantly? To put it simply, there's no need to be faster than they are. I mean, sure there is a bit and faster microcontrollers do enable some things, but what are you going to do in say a vending machine that ...


24

If you want an example of something that is widely used, but different, look at 1000BASE-T gigabit Ethernet. That uses parallel cables and non-trivial signal encoding. Mostly, people use serial buses because they are simple. Parallel buses use more cable, and suffer from signal skew at high data rates over long cables.


24

What you're describing is PMOS logic. It has some significant disadvantages over CMOS: If the value of the resistor is low, the gate will consume a significant amount of static power when the gate is active. CMOS gates consume essentially no power when they are not actively switching. If the value of the resistor is high, the gate is slow to turn off, ...


23

A reason I don't think anyone mentioned yet: Technology constraints: Resistors on chip are massive compared to transistors. To get a decent value, we are talking orders-of-magnitude bigger than the smallest transistors. In other words, next to all the other advantages you get with proper CMOS (static current, drive levels, output swing), it is also just a ...


23

In FP multiplication, exponent processing turns out to be simple addition (for exactly the same reason that multiplication in the log domain is merely addition). You have come across logarithms, I hope. Now consider how difficult it is to add two numbers in logarithmic form... Floating point inhabits a grey area between the linear and log domains, with ...


22

The practical definitions of RISC and CISC are so muddied and blurred now they are almost meaningless. Now it is best to think of them as more about "philosophy", in the sense that a CISC architecture has a richer instruction set with more powerful individual instructions (e.g. DIV and the like) while a RISC instruction set is bare bones and fast, and ...


20

I've attended an IEEE talk last month titled “Back to the Future: Analog Signal Processing”. The talk was arranged by IEEE Solid State Circuit Society. It was proposed that an analog MAC (multiply and accumulate) could consume less power than digital one. One issue, however, is that an analog MAC is a subject to analog noise. So, if you present it with ...


19

The word banking is used in two different senses when applied to registers. Banked Registers for Interrupt Handling The sense with which the StackOverflow question is concerned is similar to the use in (memory) bank switching (used by some 8-bit and 16-bit processors) in function. The names of a collection of registers are mapped to a different collection ...


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