New answers tagged

1

Back in the olden days, the 8088 and 8086 had four general-purpose registers, named AX, BX, CX, and DX. Those registers were all 16 bits wide. Each register could also be accessed as two 8-bit chunks, the high byte and the low byte. Those 8-bit chunks were AH/AL, BH/BL, CH/CL, and DH/DL. Assigning a value to AH changes the contents of the upper byte of the ...


0

I'm a digital IC designer, but I have no knowledge on x86 CPUs. I think CL/CX/ECX are just software terms which are used to refer to different portion of a hardware entity (let's name it 'REG'). The 'REG' with certain bit width is the real memory device (probably flip-flops) inside the CPU circuit which is addressible. Why is CL for narrower 'REG' introduced?...


0

TDP for such low end CPUs is often highly exaggerated. It's hard to find proper benchmarks for a CPU such as Athlon x2 340, but I suspect that even at full load it won't require 65 watts worth of cooling(what TDP really means is a whole another topic). Another factor is binning. The Athlon x4 has 4 fully functional cores, and it's verified to run within spec....


0

Typically, modern (amd64) CPUs are rated for up to ~100C(and will automatically shutdown if they exceed their maximum temperature). However, running hotter means higher power consumption and will cause components to degrade faster. Also, if you're overclocking(as many enthusiasts do), your CPU is already out of spec and may not remain stable if the ...


3

You dont want to mess with an intel, no. Not a good starting path at all. Unless perhaps you run one of the 8086/88 simulators, but even then I would not start there. As far as learning assembly goes, pdp11 (not joking), msp430, arm thumb, arm, and a few others are good starting points, build a good foundation then each subsequent instruction set is easier....


0

How about a fun version that's ALMOST bare metal? The actual silicon for the old 6502 chip (the cpu inside the original Apple-II,) has been completely taken apart by hobbyists, and you can play with it online right now. Type in some opcodes. Single-step through it, and watch the voltages changing on the aluminum traces inside the chip. Zoom in to examine ...


0

In college, i programmed a Motorola 68000 firmware board in assembly. I had to actually look up the opcodes and type them in. It looks like similar boards are still available. http://www.easy68k.com/paulrsm/mecb/mecb.htm


0

If you have an old MP3 player supported by Rockbox, you might find looking through the source code used to boot the player very interesting. For example, on a Sandisk Clip, you can see the bootloader which is branched to immediately after the device finishes running its onboard mask ROM: https://git.rockbox.org/cgit/rockbox.git/tree/bootloader/sansa_as3525....


1

Would it be possible to purchase something like an Intel i7, and, execute the assembly (compiled binary) on the chip without a whole bunch of peripherals? No! But you could use a simpler CPU which requires very little support circuitry. I know in "build-your-own-computers" there's the CPU, Motherboard, RAM, monitor. power-supply, etc. but what ...


1

Its hard to build cooler CPUs, because the successful use of the gates and flipflops and static_RAM and the data_movement busses are all OVER DESIGNED for performance margin. You may need a 7picoSecond NAND gate. But because of variations in the doping (which with 2020 and earlier CPUs, was already a problem), you design it for 4 picoSeconds +- 1pS (as ...


0

Back when "CPU" meant a box with switches and light on the front panel, Then the minimum configuration would be the CPU itself, and a memory system, and the bus that connected them, and the power supplies.* Then, you could use those switches and lights to examine and modify memory locations and the PC register, and at least one of those switches ...


0

Your best bet is going to start with a simulator. Check this out: MARS MIPS simulator You can use this simulator to write assembly code that you can then compile and run. I took an advanced embedded systems class and we used this simulator to write simple programs for a MIPS processor. If I remember correctly we used this book to learn about the architecture:...


0

If you want to know everything about assembly language for the Intel processors I would check out Randall Hyde's "The Art of Assembly Language Programming" book. Its downloadable as a free PDF on his website. https://www.plantation-productions.com/Webster/ He goes through everything from basic logic optimization to the details of how to program ...


1

This is a pretty good resource if your learning the x86 instruction set: Intel Microprocessors I used this book to build my own 8088 microprocessor computer, I started with the processor and ROM and then worked my way up to adding RAM and peripherals (like I/O). Very educational. Because x86 instruction sets built upon the previous set, the instructions are ...


2

Sounds like you want to work with a microcontroller. You can write assembly language code easily for an 8-bit microcontroller. You could use an Arduino board and AVR Studio and program it through the ICSP header with an appropriate tool. Or a PIC etc. It's feasible to program ARM and even more complex chips in assembler but there is a lot of tedious setup ...


-4

The thing is, the scientists of today don't understand why things get hot even when specific energies are applied to achieve a specific result. It's all down to quantum energy potential to achieve the flipping of a transistor (over-loaded/under-loaded) which they can't perfect because of universal forces that act upon your chip even though it's shielded, ...


1

The numbers chosen by Intel (note that other manufacturers use slightly different naming conventions - global foundries had their 32nm node followed by 28nm node, and TSMC has 12nm and 6nm nodes along their 14nm+ and 7nm+ nodes - but the same general principle applies) reflect the fact that each node has approximately twice the density of their previous node....


6

There are 2 main reasons: Heat dissipation - this requires contact surface. That surface transfer heat from the CPU to the cooling system. If it's 3D, it becomes extremely hard to evacuate heat from the under-layers as the surface-of contact would be significantly less than needed to sustain the thermal transfer. Yields - they are low in many cases anyway. ...


73

The two killer reasons are yield, and heat. Yield. Every time you do a process step, you get less than 100% perfection. Let's say you get 99% perfection per step. In a process with 20 steps, you would be down to 82%. In a process with 1000 steps, you would be down to 43 ppm, 43 successful builds for every million wafers started. Heat. Our existing designs ...


7

Transistors are far easier to make on the bottom layer, because the traditional structure involves "n-well" or "p-well" structures. Also: Planarisation. The bottom "substrate" layer is mechanically polished to a very high degree of flatness. Subsequent layers on top are etched and deposited, but each time is less than perfect. ...


17

Heat removal is the issue. Already some chips have higher energy density than a nuclear reactor. Consider a hair_drier ---- 1,500 watts with a air_blast fan to cool the tungsten coils. And the coils glow dull red.


8

But what would you get from that? The number of transistors per mm² of mask you get would still be the same, you'd just have more masks Alignment of multiple masks is way harder, the more masks need to be aligned. You'd probably need multiple extra interconnect layers for each extra transistor layer Making a connection between layers is more effort than ...


6

While it is true that process node names are currently simply based on marketing and not any physical property of the silicon, the process node used to closely match the actual sizes (in nm) of the transistors on the silicon, in terms of the gate length of each transistor and the metal half-pitch between the transistors. As progresses in shrinking dies ...


0

Most modern CPUs (except possibly for some small embedded ones) use multiple levels of data cache between the CPU and memory subsystem. Possibly write buffers as well. So single bytes might be written to the a write buffer or inserted into a first level cache line. But then entire multi-byte cache lines are read from and flushed to DRAM memory, level by ...


7

Gordon Moore started at Shockley Labs in the Bay Area, along with several other diverse and creative spirits. When those folk tired of the headgames of Shockley, they arranged for financing from Sherman Fairchild (of Fairchild Corp), and founded Fairchild Semiconductor. Here is the key point --- at Fairchild, Dr Moore and the other (7) founders had to INVENT ...


49

There are a number of different reasons for this. The numbers aren't chosen Modern CPU manufacturing processes, at least for top-of-the line mainstream CPUs such as Intel Xeon and Core, AMD Epyc and Ryzen, etc. are at the very edge of what is currently physically possible and economically viable. Since the laws of physics and the laws of economics are the ...


0

What does your layer 2 (Ethernet) network connectivity look like? Just a direct cable? (Does straight / crossover matter?) Or are you running this through a switch? If so, what sort? Dumb, or managed? If managed, does the switch know anything about IP multicasting = does it support IGMP Snooping? Not sure if this was the TIA portal or some other Siemens PLC ...


1

Nothing special, TIA is a master of troubles and issues. First, make a correct settings for your PC ethernet NIC, make the IPv4 to be in the same subnet, for example 192.168.0.150. Then plug the cable from your PC to PLC, choose PN/IE, select the NIC you want to use (those that you configured a static IPv4), direct slot x1, start search. If it doesn't work ...


0

Use a free vendor FPGA development IDE package. E.g. Lattice Diamond, which comes with a free cut down version of the very excellent ActiveHDL VHDL & Verilog simulator. If you write your Verilog or VHDL code using generic logic and avoid vendor macros you don't get tied to a specific vendor. If you have to use vendor macros write wrappers for them so ...


0

Logisim is a free, open source digital logic simulator. It is commonly used in education, and can quite easily be used to design and simulate simple CPUs. For more complex CPUs, hardware description languages (Eg verilog or VHDL) are more commonly used than the schematic based approach of logisim. Open source simulators for these are also availabke (Eg ...


1

Everybody uses simulators for this purpose. Two that are freely available and widely used are Modelsim (free version may have limited functionality), and Verilator (completely free, can be faster, but less functionality).


-1

This looks rather unusual. Usually, you find passive components, mainly capacitors below modern CPU's base interposers; these look like dies themselves. You'd call these "chiplets", then, but it's really an unusual thing to find them between the solder balls. I'd presume this chip is something super special-use. Maybe not actually a CPU, but an ...


2

since this is more like feedback: let's have a wiki. You need some way to store the current (or next) PC. That and a JMP can form a CALL; then you need JUMP (contents of address where you stored it) to RETURN. Stack is a convenient way to handle call/return and a lot of other stuff, but quite a big change to your architecture. why do you have fused load+...


3

It's hard to be sure from your snippet, but it appears that you have a "single cycle" implementation, in which all of the activity for a given instruction happens in a single clock cycle. A maximum speed of 50 MHz is quite typical for such implementations. To go beyond that, you need to start thinking at a lower level about the physical structure ...


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