14

One of the biggest benefits of the 3 op amp INA is the equal and high input impedance. The op amp's non-inverting pins' input impedance can be up in the \$T\Omega\$ range. I'll leave it as an exercise for you, but if you look at the difference amplifier circuit, the input impedance of the negative input varies with the positive input.


14

The 3 op-amp design has three main advantages over a single op-amp differential amplifier. The input impedance is much higher, since the inputs drive directly into an op-amp input rather than into a resistive divider. The gain can be set by changing a single resistor, so the critical parts can be easily integrated on to one chip (maximizing symmetry) with a ...


9

Differential input impedance is the ratio between the change in voltage between V1 and V2 to the change in current. When the op-amp working, the voltages at the inverting and non-inverting inputs are driven to be the same. The differential input impedance is thus R1 + R2. If the op-amp was 'railed' (saturated) then the differential input impedance would ...


9

You should have taken the time to use the schematic editor when you wrote out your question. There's no reason you couldn't have done that much work. If I wanted to refer to it, at least then I'd both (1) be able to refer to device numbers and (2) be able to copy it for my own embellishments had I wanted to do that. It's your question. You should put more ...


8

There are a number of things wrong here, but the most fundamental is that you have positive feedback. That's why the output is slamming to one rail. You didn't say, but I'll take the base of Q1 to be the input to this circuit, and the output the emitter of Q3. The signal is inverted from B of Q1 to C of Q1. Q3 provides more drive current, but doesn't ...


7

The first thing I noted when I saw your circuit is that the VAS (Voltage Amplification Stage, as you call it) is directly connected to the feedback network and this implies that its gain and its bandwidth are heavily influenced by the value of the equivalent impedance presented by this network: this is the main cause of its "strange" high frequency behavior. ...


6

I'm decorating your schematic, a bit. I'm not entirely sure about your discussion, but it appears this schematic is a little more descriptive about what you are doing: simulate this circuit – Schematic created using CircuitLab I added \$C_2\$ because I think you have enough sense already that you have one there when providing an input signal. How ...


6

The time constant of an RC element is calculated \$ \tau = R \cdot C \$. Example: With \$R = 10 k\Omega \$ and \$C=10nF\$ this gives you \$\tau = 10k\Omega \cdot 10nF = 100µs\$. If you have to wait for 11 RC time constants you have to wait for \$11 \cdot \tau\$, in the example above this would be 1.1ms. Details: \$\tau\$ corresponds to the time it would ...


5

LM358 is not a rail-to-rail opamp (neither input nor output). The input CM range includes the negative rail and the output can swing close to the negative rail under the correct conditions, however this configuration passes current If to the output, and if that current exceeds (typically) about 50uA then the output can no longer swing all that close to the ...


5

Try this circuit (with negative feedback instead of a positive feedback). simulate this circuit – Schematic created using CircuitLab This is all you need to properly DC biased this simple circuit. And for DC experiments RF2 and C1 are not needed. Additional notice how easily we can set the Q-point for Q1 and Q4. Because of the fact that the Q1 ...


5

This splitting is only used to illustrate that you can calculate the gain easily. If you don't do the splitting, the calculation becomes more complicated. You don't need to do that, it's just practical. Notice that this is just a model that is equivalent to the first circuit.


4

Actually the AD629 you already found should work for you. If you look at the web page for it you will see that it is categorized under 'Current Sense Amplifiers'. Its special feature making it so usable is the capability to amplify correctly even with high common mode voltages. This means that both inputs have a voltage with respect to ground, but only a ...


4

Without seeing the input signals, I'd say the circuit is working just fine. That is, it's working as it should given the topology. Unfortunately, it won't work as an instrumentation amplifier, or even as a differential amplifier. And I'm pretty sure a differential amplifier with gain is what you intended. First, of course, is the fact that you're feeding an ...


4

simulate this circuit – Schematic created using CircuitLab So this is the easy version: $$U_{o1} = U_1 + I_1 * R_2 \qquad,\qquad U_{o2} = U_2 + I_2 * R_2$$ with $$I_1 = 2\frac{U_1}{R_1} \qquad I_2 = 2\frac{U_2}{R_1}$$ this yields $$U_{o1} = U_1 (1 + 2\frac{R_2}{R_1}) \qquad,\qquad U_{o2} = U_2(1 + 2\frac{R_2}{R_1})$$ and \$U_{o2}-U_{o1} = (U_2-...


4

Mario mentioned a thought about this. But perhaps this doesn't actually answer your question about why, in your single-ended case, you get half the AC peak-to-peak voltage at the shared emitter node. Nor are the comments that half the signal voltage will appear at the emitter actually correct. By instinct, knowing BJTs, I knew it had to be incorrect over ...


4

I like to think of the long-tailed pair as more like a teeter-totter (to give it a kind of "dynamics.") To give some clarity, imagine that you built this teeter-totter out of two lengths of gutter, joined together with a kink so that when balanced equally where the joint itself rests on a fulcrum, each side has a slight but equal downward slope. If you start ...


4

If you have a center-tapped audio transformer you can do this: simulate this circuit – Schematic created using CircuitLab


4

The collector of \$Q_{19}\$ cannot be more than a diode drop above the bottom rail, because its base is tied to the collector. \$D_5\$ then prevents the collector of \$Q_{12}\$ from being more than two diode drops above the bottom rail. Since the \$Q_6\$ (I was wrong to write \$Q_8\$ before, in comments) base is tied there too, this prevents the base of \$...


4

You say you understand the math, so I won't (re)explain it to you. You say you want the process. The process is - Start with a basic understanding of the theory. One single op-amp can produce an output that's a linear combination of the two inputs. Any resistive divider prior to the op-amp will attenuate its input; you need this behaviour in this case. ...


4

As others pointed out, this chip requires the input voltages be at least 1.5 or 2 V below the positive rail, and you don't seem to be following this restriction. In comments you asked, Why? Is there some kind of rule I should know about comparators? Why exactly 2V less than Vcc? Because the datasheet says so: The limit is 1.5 V below Vcc at 25 C (as ...


3

It simply means that the impedance or resistance from each input terminal to the common point is equal. simulate this circuit – Schematic created using CircuitLab Figure 1 and 2. Figure 1 shows a transformer input for a balanced line microphone circuit. Clearly the input side of the circuit is symmetrical and the centre-tap is connected to ground. ...


3

Getting the input of a amplifier to work outside its supply voltage range is difficult, but there are possible ways around this: Is the signal AC? If so, capacitively couple it to something that floats around ½ the supply voltage. Is the signal floating (not ground-referenced)? This can be the case when coming directly from some tranducer, for ...


3

Your differential amplifier is seeing a change in common-mode input of 9 volts (10 ohms to 100 ohms at 0.1A). You are seeing a change at the output of only 10mV. A single 100K 1% resistor mismatched by 1% will cause a 90mV error. Do you see your design problem? You have almost no signal and a huge common mode voltage change- in fact it's much worse than if ...


3

Typically pseudo-differential inputs have an asymmetrical input impedance- much lower for the 'low end' of the input. In this case, it only allows 300mV of common mode voltage. I didn't read the manual fully, but some instruments have 50 ohms relative to ground, which is high enough to prevent serious interference from ground loops. Of course a fully ...


3

Your circuit is incorrect. What you are trying to do is a gain+offset (negative offset) so you want to gain it up and offset the virtual ground point. You don't need that 10k/10k voltage divider as you've drawn it to provide a 2.5V reference. Since your full scale output from the DAC is 5V, and you want a full scale output from the opamp of 20V (-10 to +...


3

A TL082 is somewhat inappropriate for low-level instrumentation- the offset can be as bad as 20mV and the drift is not guaranteed but typically is 10uV/°C. A gain of only 1000 means that a 10mV offset will saturate an amplifier with +/-10V supplies, even with 0V in. If it was 1975 and you really had to use something that bad, you could put an AC voltage ...


3

What you're doing is known as "echo cancelling" (also here) and it's a common problem in the implementation of speakerphones. The gist of the problem is that the version of the music that you're getting from the microphone has been heavily modified (relative to the "clean" version you're getting directly from the radio) by the reverberation of the space it's ...


3

With ground at two remote points there will inevitably be ground currents (from other equipment also) circulating that cause interfering volt drops between sending end and receiving end. This produces an error and degrades your signal. That’s usually regarded as the primary issue. A secondary issue is that the impedance seen on hot and common wires from the ...


3

About this circuit for DC conditions. Current through current source equals 2 mA and collector current through each differential transistor pair equals 1 mA. Not true. \$R_1\$ and \$R_2\$ form a Thevenin equivalent of: $$\begin{align*} V_\text{TH}&= \frac{10\:\text{V}\cdot R_2-10\:\text{V}\cdot R_1}{R_1+R_2}\approx -9.32\:\text{V}\\\\ R_\text{TH}&...


2

Gain: I believe the gain in this design is too low to get a +/-10V output signal. $$V_{out diff} = \frac{390Ω}{390Ω}.(V_{i+} -V_{i-})$$ $$V_{out diff} = 1.(5 - 2.5) = 2.5V_{diff-mode}$$ or $$+/-1.25V_{comm-mode}$$ Alternatively you could make use of the Vocm, instead of the V- input to offset the ADC value. Question 1: Correct, this would destroy the ...


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