# Tag Info

0

It was a very poor class-A inverting amplifier that produced a very low max output power but wasted a lot of power making heat even when it was not playing any sounds. I increased its output power 58 times but it is still very low.

0

Phase shift and time delay are two different things. At audio frequency, that is in the kHz range, the output voltage to input voltage propagation delay of this circuit is zero. You might have propagation delay effects if the wires were 1 mile long. The BJT does not introduce propagation delay unless the input signal is in the GHz range.

0

In j1939 I can't find a PGN defined with SPN for A/C buttons. So you'd probably have to use the manufacturer proprietary fields and set your source addresses accordingly, source address 25 is for climate control ecu 1 for example. For the other way around check SPN 7853 in PGN 64993 for example. The CAN ID is compiled from the PGN, source and destination ...

1

Well, the spec seems pretty clear about that, and it's the spec so by definition the spec is right and therefore the simulation is wrong. Also, I think the special case is actually memory reads where the byte enables are actually considered. For other completions, it's simply the length field times 4.

1

For HDMI 2.0, 4 diff pairs are used to transmit TMDS[2:0] and clock, operating between 3 and 6Gbps. The protocol negotiates down to speeds defined in HDMI 1.4b for smaller frames/lower pixel rates. For FPGA design, it's going to be a hard ask to get resolutions at HDMI 2.0 speeds (6Gbps-3Gbps), you'll need to use multiple transceivers on the FPGA for each ...

5

C1 and C3 are "standard" power supply decoupling caps. Their purpose is to prevent high frequency noise that might be on the power supply rails from coupling onto the output currents. C2's purpose is a little harder to glean. The datasheet says nothing (that I could find) as to why this cap is needed or what it does, and I didn't have time to ...

2

When speed matters, you won’t want to use 4xxx family high voltage logic and choose a family with a lower maximum Vdd. The reasons for this is that newer, much smaller channels, have lower breakdown voltage, lower capacitance, lower RdsOn like 50 ohms for 74HCxx vs ~300 to 3k ohms for 4xxx family (18V to 3V) which on the CMOS drivers work fine but slower. ...

1

It sounds like a multiplexer to me. Hover over the multiplexer tag below your question for an SE definition. TutorialsPoint has some good explanations of both: A Multiplexer is a combinational circuit that has maximum of 2n data inputs, ‘n’ selection lines and single output line. One of these data inputs will be connected to the output based on the values ...

0

It is possible to implement bi-directional communications over just one wire. If you can find a ready made 1-wire implementation for your FPGA that could be a solution. A complete implementation could be complex as the 1-wire protocol is a multi drop topology that supports multiple slaves and device enumeration. Consider using an asynchronous UART transport ...

4

As long as both the PIC and FPGA support tri-state buffers (i.e. can make them Hi-z) which is highly likely, then yes, you can easily do half-duplex with a single wire. The safest way is to use open-drain outputs whereby each device only drives a logic 0 or releases the pin to hi-z, that way you can never have bus contention. A resistor is then used to pull ...

1

A real sinusoid $x(t) = \cos{(\omega t + \phi)}$, when viewed in the frequency domain through a Fourier transform, consists of two complex sinusoids: one at positive frequency, and one at negative frequency: $$x(t) = \frac{1}{2} e^{j \omega t + \phi} + \frac{1}{2} e^{-j \omega t + \phi}$$ The imaginary components of these two terms cancel out and the ...

5

D+ (or D- for low speed) is pulled up by an 1k5 resistor. Thus the current into the LED messes up "device attached" detection. Once enumerated, all devices get the SOF token every millisecond. That would light up both LEDs all the time, if the series resistors are much larger. Messing with the data lines won't work with USB 2.0 high speed ...

Top 50 recent answers are included