52

It is just much simpler to use a transistor as weak pull-up than manufacturing actual resistors on the silicon. Resistors can be larger and may require a more complex process for manufacturing both resistors and transistors, so overall it is cheaper to use transistors.


25

The current through a resistor will increase proportionally with voltage, and the power dissipation will increase with the square of voltage. The current through a depletion mode MOSFET will essentially top out at a certain voltage and then remain nearly constant beyond that (within device limits). This makes them extremely useful for passive pull-ups, ...


16

IC design is very different to discrete design. In discrete design resistors are the cheapest components and are available in basically whatever value you want. Transistors are more expensive and can't easily be purchased with arbitrary parameters. In IC design resistors require a long track of semiconductor material which takes up a lot of space, ...


15

Resistors are physically significantly larger than MOSFETs on a semiconductor die. So if you can use a MOSFET instead, it saves a lot of space.


12

Usually a Logic Low is a low voltage, normally near Ground/Zero volts, and a Logic High is a higher voltage near the positive supply voltage. There is a range of voltages between Low and High where the input state is undefined - we don't know whether the circuit will consider it as a High or Low. If the input of a logic gate is not connected, that ...


9

This code is effectively creating an inverter with its input connected to its output. If the propagation delay through the inverter is long enough you will get a "ring oscillator". The frequency of oscillation is determined by the delay through the inverter. So, if you have a free-running oscillator what will be the value of its output at any given ...


8

As others mentioned/explained, undefined behavior is not the same as 'randomness'. And I believe you misunderstood the meaning of always @(*) construct in your example code. Simulator perspective First of all, it doesn't mean that randomly flip the value of tempBit. It means that: 'Simulator may trigger this always block for any changes in the values (i.e., ...


7

Most I2C devices allow clock stretching, by which the slave can 'slow down' a bit when it can't catch up with the speed of SCLK generated by the master. The slave does that so by stretching the SCLK line low after receiving/sending a byte (the master relinquishes the control on SCLK at this time). The slave pulls the clock back to high when it's ready to ...


7

is Low and High used as an indication of lower input voltage and higher input voltage ? Yes, but some logic families also have current requirements. With TTL, for instance, a logic 0 is not only a low voltage but the driving stage must be able to sink 1.6 mA of current from the input. And if Zero used as a low input voltage then isn't no input can also be ...


6

Can always @ (*) introduce randomness in FPGA? It's undefined behaviour. That can be random, but it's more likely to be a constant value, that might even be chosen during synthesis to optimize this structure away. "Undefined behaviour" means your synthesize can do with this what it wants, since it literally can't make things any worse. Setting the ...


5

If it's using USB, you shouldn't need any voltage level translation, because USB itself requires specific voltage levels and if the device can't output or input those voltage levels it can't claim it's using USB. At least not without getting in trouble with the USB-IF.


5

I would add that it is possible to design a digital device that can detect an open input vs. high input vs. low input, thus having a three-state input. This is done by alternately connecting the input to relatively high-resistance pull-up and pull-down resistors. This does result in fairly low sampling rates as the device must let the input settle after ...


4

Yes, that's the standard representation of a buffer. What you see are clock buffers which are present there to not degrade the rise and fall times of the clock. As typically clock nets have high fan-out, you need high drive strength to ensure that a nice square wave reaches all the registers. And yes, it introduces a delay in that path. For instance, in your ...


4

Complementary does not mean there is an inverter circuit. Complementary means, there are both NMOS and PMOS transistors, as logic that existed before CMOS had only NMOS transistors. In a CMOS circuit, NMOS transistors are able to pull strongly low, and PMOS transistors are able to pull strongly high.


4

There are temperature sensors with built-in reference and comparator, however you may not like the price and/or the package. Generally not-so-popular older parts subject to possible availability issues, since more modern parts will be configured via SMBUS or I2C or SPI. You could also consider using an NTC thermistor (for example, 100K at 25°C). They are ...


4

Based on what you write, this design really is simpler with a MCU. It enables you to control the switches and ask the MCU how they are currently set. Sure, GPIO expanders with serial input exist, but they would be pre-programmed microcontrollers. A serial port does have 9 pins, but your understanding about them has some issues. One of the pins is ground. ...


4

Zero’s and one’s (low & high) are digital defined by analog values with a margin in between for transitions and noise. No output is floating or called tri-state used on bidirectional busses. However CMOS must never be designed with no input for many reasons and must be terminated low or high as required. No input on TTL is hi, but for noise reasons ...


3

You can't reliably get a logic high or low from the LM35 alone, as it only produces an analog value. However, you can use a comparator to compare the voltage coming from the LM35 against some preset value corresponding to the 80 °C threshold you need. There are even chips like the TLV3012 with an exposed internal voltage reference, so you don't need to ...


3

This is another in your series of questions on this topic and it seems you are still very confused about CMOS input impedance. It's very simple: If the pin is configured as an input it will have a very high input impedance, typically > 1 MΩ as is characteristic of any CMOS input. Table 18 of the datasheet shows that the input leakage current is < 0.5 ...


3

You can't have same configuration in all modes. The pins will be unconfigured when MCU is in reset. After your program is running, you can configure them in any way you like within the limits of the device of course. For IO pin, you need to know if you want to use it is an input or as an output. Obviously you can drive an output high or low, but can't do ...


3

That block is called undervoltage protection, and it takes many forms, and they depend on your voltages, speed and current requirements for it. Also, many voltage regulators directly integrate that functionality. Other than that, I think your notation has a bug, so I'm not 100% sure what to make of it. Also note that your Vo being 0V is rarely what you ...


2

You need a resistor for every segment of your LED display. Otherwise the LEDs are shortening the driver outputs.


2

It could be confusing since the 8051 has memory mapped registers. So each register is also accessible at a memory address. In fact the 8051 registers simply are memory cells, with shortcuts. However the difference is huge: Register addressing point directly to a register. No memory address involved. You say R5, you go straight to R5 Direct addressing point ...


2

I've read that the integrated circuit samples the signal at its clock rate, kind of like an ADC will sample an analog signal. If the signal is high enough to drive the receiving buffer into saturation, then the signal will be read as a "1", otherwise it is undefined or 0. Is this correct? Please, if you say "I have read..." add a ...


2

(TL;DR) I've read that the integrated circuit samples the signal at its clock rate, kind of like an ADC will sample an analog signal. If the signal is high enough to drive the receiving buffer into saturation, then the signal will be read as a "1", otherwise it is undefined or 0. Is this correct? Yes If that is correct, then that would mean that ...


2

For a clock-synchronous digital signal, the receiving end is typically a clocked flip-flop, or a device that samples from the continuous-time domain to a discrete-time domain. While this technically allows us to discuss a Nyquist frequency, it's easier to just think of a baseband digital signal that we have to sample at its clock rate (or oversample). This ...


2

Making a model is not easy work. Your interest should be the behaviour of the model, not the exact, nitty-gritty details of its internals. That's not to say that you can't go that way, there are people who made transistor-level 741s, and more, but those models will also be very slow in terms of simulation time. Therefore, as AJN mentions, the converter can ...


2

The stepper motor driver gives you a pull-up and a pull-down resistance measured with a 5 mA current (either sinking or sourcing). The output is pulled to VSDO or GND respectively. With this you can calculate the output high level: \$V_{OH} = V_{SDO} - (75\ \Omega * 5\ \text{mA}) = V_{SDO} - 0.375\ \text{V}\$ But that is for a 5 mA load. Your controller pin ...


2

The stepper IC has an SDO support that allows 3.3V interface with standard 5.5V logic impedances. Historically this CMOS push-pull impedance for 5.5V logic has always been 50 ohms +/-50% and this IC is within this boundary at 5V. It will be slightly higher than typical at a lower supply voltage of 3.3V. When operating at the maximum possible data rate for ...


2

If you connect the LED anode to the same voltage as the op-amp rail, it will be impossible for the LED to be reverse biased at all. If you use a lower supply to the LED anode (5V, say), then you need to limit the anode-cathode voltage to no more than 5V, or 10V max for the anode. You could do this by using a reverse-connected diode across the LED which will ...


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