17 votes
Accepted

PCB routing: isolate through-hole pins to force routing through decoupling capacitors?

The truth of the matter is that it doesn't really matter if the current "hits" the capacitor before the pin of the IC or not. This has long been debated and recent studies have suggested ...
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  • 20.3k
6 votes
Accepted

Why does Arduino use external ground at the barrel jack side?

If you are not using dedicated PCB layers for GND/PWR planes but are mixing it with other traces, it is a very good idea to draw traces for each connection before applying the copper pour. If you just ...
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  • 3,477
4 votes

PCB routing: isolate through-hole pins to force routing through decoupling capacitors?

The only thing that matters is that you keep the inductance of your track arrangement low. Inductance depends on the area between the tracks of one closed loop circuit (and regardless what else is ...
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  • 13.1k
4 votes
Accepted

Autodesk Eagle board testing spots

Yes, there are elements called "test points" (TP), which are simply an exposed pad of any form you like (there are many cicular and rectangular shapes available). Press "place component&...
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  • 3,318
3 votes

PCB routing: isolate through-hole pins to force routing through decoupling capacitors?

A long while back I read "PCB EMC Design Techniques" by Mark Montrose, and I think it's still a good read. At the heart the current loop impedance is important, and that includes the ...
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  • 2,821
2 votes
Accepted

MAX9919 Thermal Pad

Yes, you are interpreting this correctly if you thought this is electrical ground. It says, “CONNECT EP TO SOLID GROUND FOR PROPER THERMAL AND ELECTRICAL PERFORMANCE.” This is necessary to appreciate ...
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2 votes

Reason for a EAGLE "tRestrict" (no copper pour) layer under SMD/SMT resistors

You don't have bare copper beneath a surface mount resistor because there is a possibility that it will form a voltage breakdown path with the body of the resistor. If you want to remove heat use ...
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  • 384k
2 votes
Accepted

Eagle all grounds connecting together

Where is the problem here? Same Nets (Same Name) get connected together. If you want to split grounds, use diffrent symbols for each rail.
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2 votes

How to create a part in Eagle that consists of multiple other symbols? (with elements that share the same pin)

You can't have multiple symbol pins map to a single footprint pad in Eagle. What you could do is make a symbol for the two transistors which share a pin and add that to your device instead of two ...
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1 vote

Applying bottom Soldermask layer to EAGLE board

They mean bStop. The layer is missing because it is empty: no pads on the bottom layer means no openings in the soldermask. The answer is (1): you want the whole bottom side covered in soldermask.
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  • 3,084
1 vote

Restrict layer issue in EAGLE using C1206F334K1RACTU capacitor

The box should be on the Keepout layer, not the Restrict layer. The Keepout layer is intended to prevent other components being placed there. If Keepout shapes from different components overlap, ...
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1 vote

TC551001-70 Eagle library

I search on my computer and I already have the 32 pin DIP footprint in my Eagle library. I share via this link that's from my personal one drive: https://1drv.ms/u/s!At8VA9z1pAjFgQi8zXygfRh8uccT?e=...
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  • 267
1 vote

Suggestions on how to add capacitors to MCP1406

The data sheet states this: - These capacitors should be placed close to the driver to minimized circuit board parasitics and provide a local source for the required current. It also says this: - ...
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  • 384k
1 vote

Is using opto-couplers a good idea to switch in between two 80 pin connectors?

back in the days i saw a design that uses some 74LS244 TTL chips to switch between parallel ports connectors of a computer. Looking into the 74LS244 data sheet will be self explanatory on how to make ...
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  • 487
1 vote
Accepted

Why does the footprint change when I add it to the schematic?

I got what I was missing. For someone, who faces the same issue...it is related to annular ring size as @Jeroen mentioned. The pads' annular ring size depends on your DRC settings. For that, go to DRC ...
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1 vote

Unable to route all pins for MAX30208CLB+ in eagle

Have you used tRestrict, bRestrict or vRestrict layers in the component? They would prevent or warn you for routing the signals? If those are ok, you need to check DRC settings. You can write "...
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  • 2,149
1 vote

Eagle - placing pin number silkscreen

As RodezIO mentioned, you can do it in the footprint of the part, however, if you need some custom text, and repeated text(This is purely for the silkscreen): You need to add an attribute to the '...
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1 vote

How to chose via diameter and drill size based on trace width

I came here with that same question, then I did some simple research and it became an answer :-) Basically, my take is one should maintain the copper cross-section of the trace through the via in all ...
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1 vote

Unable to find connector in eagle library

Here it is. Search at this website for 3D models: 4 pin Molex connector Altough, Tom's answer is the safest bet.
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