15

A single parity bit can only check for the presense of single or odd numbers of bits in errors so expecting it to detect when a peripheral is disconnected is probably expecting too much. However, many systems will produce a continuous series of 1's when a peripheral is not present and this can be achieved with a simple pull-up resistor on the returning ...


11

You have to assume certain things just work, even in a world with error checking. Why pick on IIC or SPI when there are usually many more digital signals on a board? You seem to be OK with assuming those will all be interpreted as intended. A properly designed circuit on a properly designed board should be reliable. Think of a CMOS output driving a CMOS ...


8

A Hamming code is a particular kind of error-correcting code (ECC) that allows single-bit errors in code words to be corrected. Such codes are used in data transmission or data storage systems in which it is not feasible to use retry mechanisms to recover the data when errors are detected. This type of error recovery is also known as forward error correction ...


7

RS-485 and RS-232 a electrical-only standards. The same data encoding scheme is usually used on both. The difference is that RS-232 uses a single wire for the signal with levels below -5 V and above +5 V, while RS-485 uses a differential pair with 0-5 V levels. RS-485 is also intended to be multi-drop whereas RS-232 is point to point. You can chose to ...


7

I'd like to somewhat simplify the schematic you've got, so that we can temporarily avoid having to continually discuss the potentiometer when the real purpose is supposed to be trying to understand the circuit: simulate this circuit – Schematic created using CircuitLab In the above, I've provided a behavioral model on the left side. It's followed up ...


6

There are various techniques to reduce the problem like the ones you mention, but there is no 100% solution. Memory corruption can be corrected by error correcting (ECC) memory, at the cost of extra memory and the correcting hardware itself (which causes extra delay). In some cases you must take care to access all memory regularly to prevent single-bit ...


6

Especially for protocols that are not designed to be used over cables, a properly designed board won't have errors, and a poorly designed board won't work well with or without error checking. For example, glitches on an I2C bus with multiple slaves can permanently lock up the bus(*) unless the master has a driver that can pull SDA high even when slaves are ...


5

Parity, or any block error detection, is intended to detect errors within a data transmission itself. Parity is not designed to detect whether or not data transmission is taking place. Given a transmission line, there are several different kinds of concerns. The two which are relevant here are: 1) outright failure of the line itself, and, 2) block data ...


5

Single-event upsets (SEU) at sea level tend to be caused either by radioactive contaminants in the IC manufacturing materials (particularly the metals) generating alpha particles or by high-energy neutrons (caused by cosmic rays in the atmosphere) ionizing atoms in the silicon itself. Over the years, manufacturers have greatly reduced the threat caused by ...


4

with input select led <= table(to_integer(unsigned(d & tmp))) when "0000" | "0001" | "0010" | "0011" | "0100" | "0101" | "0110" | "0111" | "1000" | "1001" | "1010" | "1011" | "1100" | "1101" | "1110" | "1111" and ob = '1', ... The syntax error occurs at the "and" clause which is not part of a ...


4

This isn't exactly what you describe, but there are several techniques for forcing embedded systems to reboot when something unexpected happens, after which they hopefully will run correctly. A watchdog timer is a circuit that reboots the processor if the timer does not get reset by a software instruction every so often. This adds protection against the ...


4

In the theory and practical world of today's Digital Communications, Source and Channel are separated way too much. Source coding happens somewhere up in the 6th or 5th layer of the Protocol stack and Channel coding occurs at the PHY layer(layer 1), beyond which Modulation happens. So when it comes to transmission at the Physical layer, for a systems ...


4

Easy software solution An easy software solution would be to send the data twice, first receive it and then verify it. It's highly unlikely that exactly the same bits fail twice. Maybe, for educational purposes, you can try to make an algorithm that sends a checksum. So when sent twice, and received twice (exactly the same), it'll be verified. If this ...


4

There is no solution for that constellation. Consider the point labeled 000, it has four (perhaps five) neighbours, for a three bit code they can't all differ from 000 by a single bit.


4

From the publication in question: Our upper bounds are all determined by considering a genie-aided decoder with access to side information about the deletion process. This is referring to a fictional construct where the decoder has more information than would be naturally available, such as to a supernatural being such as a djinn. It is used to ...


4

There's no obvious benefit of even parity over odd. In communication and storage schemes, the parity polarity (odd or even) should be selected to trap the most likely or highest-occurring failure modes. As you say, an unresponsive target or broken data receive wire may well result in a MISO line stuck high or low. When communicating even numbers of bits, ...


4

You will never, ever get the probability of an error occurring down to zero. Moreover, in this sort of link, the errors that you do stand to get are going to interrupt one or more entire packets. It's a much better idea to design your protocol with some sort of reliable error detection (i.e., a CRC, with a length of your choice), and with an information ...


3

Yes. A retransmission is equivalent to sending parity bits in an FEC code. One advantage is that it can deal with varying channel conditions - more retransmits when the channel is worse, fewer when it is better. However, a frame must be thrown out if even a single bit is flipped (presuming no FEC) so retransmits end up being highly inefficient as you end ...


3

It is not possible to correct 'all' error bits, as then you would not have to transmit or store any information. The point of error correcting codes is to control the error rate. Let's say you have a medium with an error rate of 1 error in 1000 bits. With forward error correction of some sort, you can lower the error rate to 1 in 1000000 or better at the ...


3

No amount fo filtering can correct a contant error that is inherit in your input data. Assume you are in rest, but your accelerometer gives a reading of a very low constant value X (its error). No amount of filtering will change this. Integrating this X over time gives your 'speed' t * X, which increases linearly. Intergrating this speed over time gives ...


3

I had done some research some time ago on space communications, here is my memory test: spectral efficiency is the ratio of the datarate achieved by the signal bandwidth occupied, or how the initial bandwidth is altered - before it is actually transmitted. This is a property of the modulator, which modulates a high frequency carrier wave in function of the ...


3

Your differential amplifier is seeing a change in common-mode input of 9 volts (10 ohms to 100 ohms at 0.1A). You are seeing a change at the output of only 10mV. A single 100K 1% resistor mismatched by 1% will cause a 90mV error. Do you see your design problem? You have almost no signal and a huge common mode voltage change- in fact it's much worse than if ...


3

Think about the probability of an uncorrectable error occurring in each message. If you just send r bits, all errors are uncorrectable, so the chance of a successfully sent message is $$(1-P(bitError))^r$$ (in other words, all bits have to pass through with no error.) Now, say you spread the energy just a little to add k error correction bits, such that you ...


3

8b/10b coding is mainly a spectrum shaping code, not an error correcting code. It ensures a minimum transiton density and no dc content, which are useful properties in ac-coupled transmission paths. 8b/10b codes do allow detecting single-bit errors, but not correcting them.


3

I don't know the odds for this to occur, and I suspect them to be incredibly low. However, if you're really serious about trying to detect such errors, here's one simple way you could: Perform the exact same calculation twice storing the results independently. If all has gone well, both results will be identical. So if you compare them and they differ, you ...


3

I believe you are correct in understanding that the bus is looking for nonconsecutive occurrences; I read through the Bus Off Error Recovery portion of this CAN example. The bus is looking for a total of 128 occurrences in total to pass before recovering, not necessarily in a consecutive sequence.


3

Why do you ask that only regarding error checking? How can you be sure that the start condition is interpreted correctly? On wireline or wireless communications, the start of frame is a very complex combinations of bits, while on RS-232 it is a simple high to low change, and on I2C a simple protocol violation. My point is that not only error checking is ...


3

RS-485 has several advantages over RS-232. Multi-drop from one master to multiple slave nodes. Differential signals for higher noise immunity. Lower voltages means that a 5 V PSU can be used. With the multi-drop facility it is necessary for the transmitter and receivers to be a little smarter than may be required for RS-232 communications as addressing has ...


3

As far as I know the term "Genie-aided" goes back to Jacobs, I., and E. Berlekamp. "A lower bound to the distribution of computation for sequential decoding." IEEE Transactions on Information Theory 13.2 (1967): 167-174. with the central paragraph here being: Since our initial bound involves only the first N letters of the tree, we may expedite ...


Only top voted, non community-wiki answers of a minimum length are eligible