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1 vote

Two port feedback analysis of shunt-shunt amplifier with unity feedback

The amplifier output is not shorted; it can be modeled as a unity-gain amplifier with an input of zero volts driving capacitor C1. Assume C2 starts at zero volts, and Vin is a constant. C1 is charged ...
John Birckhead's user avatar
2 votes

Deriving inverting op-amp configuration gain from feedback theory

In both cases, non-inverting and inverting, the feedback factor \$\beta\$ is the same, because it is a measure of what fraction of a change in output is returned to the error-amplifier's input. A ...
Simon Fitch's user avatar
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0 votes
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How to compensate this circuit?

Look at the resistances and capacitances at each node and the op amp model. If what you've found can't explain your Bode plot, keep looking. I would also not make assumptions about the Rout of either ...
JkingNH's user avatar
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2 votes
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Why will the offset of a source-follower which is connected to the output of an opamp as a voltage buffer limit the op-amp output swing?

When you add resistors at the output of your amplifier, you're forcing the amplifier to drive not only the "real" load (another amplifier, an ADC, etc), but also these resistors. But you can'...
Designalog's user avatar
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0 votes
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Sine wave CMOS buffer from inverters with or without feedback

Assumptions: I'm assuming you need to preserve the amplitude and frequency information of your signal. Therefore, you need a linear amplifier, which means, you need negative feedback. I also assume ...
Designalog's user avatar
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0 votes

Sine wave CMOS buffer from inverters with or without feedback

Is it possible to buffer a sinewave using inverters alone or with some kind of feedback? Two things are needed: - The inverter needs to be an unbuffered type A high value resistor (typically 100 kΩ ...
Andy aka's user avatar
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0 votes

Sine wave CMOS buffer from inverters with or without feedback

CMOS inverters can be used, to some extent, as linear amplifiers, and they have been used. You need an unbuffered inverter for it to work, as standard inverters are buffered, i.e. they have three ...
Justme's user avatar
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1 vote
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How to analyse this with nullor block?

This is the correct abstraction of your NMOS common-source amplifier into a nullor. Note, this is an AC representation, which is the reason why I'm connecting \$R_D\$ to ground. You can of course ...
Designalog's user avatar
  • 3,790
1 vote

How to analyse this with nullor block?

About Nullor: ANALYSIS OF A CIRCUIT IN THE PRESENCE OF NULLORS a) each nullor must be replaced with a pair of norator and nullator bipoles; b) each nullator must be replaced with a (virtual) short ...
Franc's user avatar
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3 votes
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What is the feedback \$\beta\$ for this resistor feedback?

What is the feedback β for this resistor feedback? This boils down to how much the output signal is attenuated at the gate (with the input VIN set to zero. So, it's a simple potential divider ...
Andy aka's user avatar
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Designing a PI controller for a first order system

There is an easy solution that I have found very practical for a sampled controller ( Use Z transforms below and find the minimum settling time controller). The pole zero cancellation is applied and ...
Wim's user avatar
  • 1
4 votes

Stability test for Feedback Amplifiers

If magnitude of loop gain i.e. |T (jω)| > 1 at the frequency where phase(T (jω))= −180◦, then the amplifier is unstable. This is incorrect, but it is a very common mistake. One can easily ...
Math Keeps Me Busy's user avatar
1 vote

Buck regulator's feedback voltage far lower than expected

So possibly it is a soldering problem? If you aren't getting output, check the startup. Look at Vin Vout and the switching gate if it's not internal. If you are worried about solder on many QFN's ...
Voltage Spike's user avatar
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1 vote

How to break the feedback loop and add the loading?

The issue with analyzing feedback circuits in this manner is, as you have pointed out, how to handle the effect of the loading (there are other issues that I will briefly mention at the end). Using ...
snEE's user avatar
  • 241
0 votes

Why am I concluding that the emitter-degenerated CE stage is unilateral?

In what follows, the calculations to obtain the elements of the quadrupole admittance matrix or relative y parameters are reported: Based on these results, the quadripole is reciprocal only if ro is ...
Franc's user avatar
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0 votes

Why am I concluding that the emitter-degenerated CE stage is unilateral?

Your conclusion \$Y_{12}=0\$ is incorrect. You have to assume there is a driving source at \$v_{o}\$ to calculate \$Y_{12}\$ \$Y_{12}\$ is the current at port 1 divided by voltage at port 2 when port ...
Pangus's user avatar
  • 351
2 votes

Why am I concluding that the emitter-degenerated CE stage is unilateral?

Your derivation is correct. For that circuit itself with no driving sources, all signals (voltages and currents) are, of course, zero. To calculate \$y_{12} \$ parameter, you should assume there is a ...
internet's user avatar
  • 334
2 votes

MP28167-A DC-DC converter recommends a resistor T-network in feedback loop

The idea appears to be to keep the gain of the "internally compensated" error amplifier at some level to provide adequate response (e.g. recovery time and dynamic overshoot/undershoot amount)...
Rohat Kılıç's user avatar

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