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As a software guy, I had the same kinds of problems with HDL/Verilog... the hardware does not run in in any order, everything happens continuously, all at the same time. Your idea that "logic gate 4 hasn't run yet" doesn't quite match reality.
The real problem is that the digital design model is just a simplified approximation of reality, and what ...
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The circuit simulator applet has a bunch of sample circuits you can simulate, including well-known flip-flop types. It highlights logic levels on wires with color, producing a nice animation of how signals propagate though the schematic:
On the lowest level, the speed of signal propagation is often defined by parasitic resistances and capacitances: once the ...
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The difference is as simple as their names, there's nothing hidden in the depths.
A positive-edge triggered flip-flop triggers on the positive-going (0-to-1) edge of its clock input.
A negative-edge triggered flip-flop triggers on the negative-going (1-to-0) edge of its clock input and is a perfectly valid thing to do, though rarely is it done.
In all other ...
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I also needed a 1 Hz clock and wanted to avoid the usual CD4060 / CD4013 / CD4521, and I just found this AHC divider series from NXP, in particular the 74AHC1G4215 that does just that, has a small package and is available for 50ct in qty. 1 from Digikey for example.
I think these are quite recent and weren't available when you posted your original question. ...
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