19

That sort of generator uses DDS, or Direct Digital Synthesis It keeps track of the phase of the required output in a register, and outputs the cosine of the phase. To use nice round numbers, let's say you have a 10 MHz clock, and want to generate 1.000000 MHz. Each 100 ns clock cycle, your phase register gets incremented by 0.1 of a cycle. If you want to ...


6

You can teardown your cheap function generator, I am certain you will find a DDS chip or a FPGA doing the same. However it is possible to increment/decrement frequency in range of milihertz but the precision is relative to XTAL precision. So you are able to get a sinewave of mHz when you subtract two generated frequencies from the same XTAL. If you would ...


3

A CPU's logic design is highly tuned to minimise the number of gates between registers (made of flip-flops); some CPUs have 12 or 14 or 16 gates on the longest path. That means a signal has to propagate through 2 FFs, 13 wires and 12 amplifiers (gates) before the next clock pulse. (This paper suggests the optimal would be 6 to 8 gates before the FF delays ...


3

Neil and Marko have already responded in great detail. From my superficial point of view: the generator contains a DAC (or several DAC channels) and performs PCM wave playback. The design tradeoffs are approximately: how stable a reference clock you can get DAC resolution (bit depth) and sampling rate are factors (and a partial mutual tradeoff) computing ...


2

The first table is only usable at an RF power of -10dBm, and only at an LO frequency of 5.25 GHz. You would expect the power of a 0RF spur to stay constant, regardless of the input RF power, so it's not correct to try to use the first table to take 3.4dB with respect to a different RF input power. Given that the LO to IF isolation is given as typical 32dB, ...


2

150Ghz or higher. while -for example- a CPU runs at only at a base clock of 3Ghz. Well, a CPU isn't a single transistor; it's billions, and even the speed of light wouldn't allow for a CPU core to distribute a clock consistently across a die at 150 GHz. It gets worse, though: your transistor might switch incredibly fast, but it has to (dis-)charge the gate ...


2

Exactly the same way: In DSSS, the spreading sequences for different users are chosen to be orthogonal, and In FHSS, the hopping sequences for different users are chosen to be orthogonal.


2

If you read into major blackouts in history (which have been attributed to cascading effects) - e.g. the 2003 Italy blackout or the 2003 US Northeast blackout, you'd see that the common pattern is that the changes to the grid load were too quick for reactive action. It's not that the undervoltage or underfrequency itself was the problem, because you can ...


2

Suppose I have a message say "Apple is red" which I need to send through my laptop to a device on the network. My laptop will encode it into binary>then into a common code the channel supports-for more efficiency > Space is left between each word/null symbols to differentiate?(Explain please)> Then this is modulated using digital keying ...


1

Many publications, when they speak about a single transistor, the maximum and cut-off frequencies are way higher than of the final circuit. Think about what \$f_{\mathrm{max}}\$ actually means. It is the frequency at which the transistor has unity power gain. In other words the transistor cannot be considered an active device above this frequency. In ...


1

Sounds like you want a protocol tester more than you want an oscilloscope. But oh well, that's not the question here. I was told that in order to troubleshoot and test on this standard, the scope must be capable of 1 GHz No. Even wikipedia will tell you that it only requires CAT3 cabling, and that doesn't guarantee a bandwidth even close to that. Ah, ...


1

My question is what some of the dangers of this drop are for the grid? How can this lead to a cascading problem (a blackout)? Under voltage will cause induction motor load to start drawing excessive reactive (var) from the system. Further exacerbating the under voltage condition and possibly leading to voltage collapse. Capacitor banks used for voltage ...


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