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Since CLK and counter change at the same time, you get a zero-time glitch on CLK_inner1, which you can't see in waves. Since the simulator senses a change on CLK_inner1, the always block is triggered, and u1 gets the value of Vin. You must use glitch-free clocks. You should use the same clock (CLK) for all always blocks, such as: module inp_samp (Vin, CLK);...


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You set sum in two different simultaneously running processes. So how is it supposed to know which one is supposed to be the right one? That's what a multi-source driver error is.


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