12

The point of this probe is that the scope has its 50Ω termination enabled. Since the scope input impedance is matched to the cable, there is no reflection from the scope. Once the load side is matched, we don't need to worry about any source-side impedance mismatch; reflections have already been suppressed. The point of the 950Ω resistor on the input side ...


7

The rules are that you must take into account impedance requirements and consider the effective RC network created by a voltage divider when considering track capacitance. See this excellent application note. Dividers even at 33MHz are not going to work well, if at all, and I say that from personal experience where I advised against it but it was done ...


6

I hope you know that a capacitor basically consists of two electrically conductive plates which are close together but do not touch. There can also be a dielectric (non conductive!) material in between. That could be FR-4 epoxy glass PCB material, like mentioned in the article. We can then use the copper on the PCB to make the conductive plates. They call ...


5

There is no magic; clocks are the same signals as any other. If you want a clean signal in 30+ MHz area, you need to take into account: Traces behave as transmission lines. Threat them as such; typical thin trace has about 65-80 ohms of characteristic impedance, and for more accuracy check your particular PCB layout. Output and input pins of ICs have ...


5

A 'pad' on a board is simply an area of copper. In very high frequency work, it's often used for capacitors to ground, with values lower than 1pF. For any given dielectric and thickness, a certain area of pad will give you a certain capacitance. There are calculators available to estimate capacitance from geometry. The great advantage of such a capacitor ...


4

The resistor will indeed reflect the incoming signals back, but those signals exist in a few mm of IC pin + resistor pin, which have an infinitesimally small inductance. Thus those reflections will not be enough to produce any measurable overshoot. On the other side of the resistor, a source with ~1kOhm resistance feeding a 50 Ohm cable will create a ...


3

placing the traces further away from the analog seems like it might reduce the interference, on the other hand a longer trace is a bigger loop area You have not shown the power and ground plane. I assume it to be solid underneath the traces as I don't see any other components or via in the region. If there are no more traces to be drawn, go for the ...


3

It depends on the physical geometry of the transmission line. I can route two tracks on a PCB, not too close together but matched in length, and use them as a differential pair. In this case, each of the individual lines will have its own return current on a nearby ground plane. Or I can make a closely coupled pair of tracks on the PCB, with the line-to-...


3

Very interesting setup. I've built a few fast high voltage mosfet pulsers, although not usually into a 50 ohm load. First the answer to your question: Yes, you can use the UCC27511A gate driver; you only need one MOSFET. However, that assumes your load is truly resistive, and that it doesn't have to be grounded on one side. Connect it like this: ...


2

Compare your circuit with a non-saturating version: simulate this circuit – Schematic created using CircuitLab You may have to add some resistance in series with the LED to keep the transistor power dissipation low enough to use a small transistor. The cause of the slower turn-off than turn-on is saturation of the BJT. As you can see the duty ...


2

This is a question I've been wondering my self from time to time, and I haven't found an answer yet. I did a simulation with LTSpice to get some kind of answer. I chose a couple of capacitors from Murata pretty much on random: 4.7 µF https://psearch.en.murata.com/capacitor/product/GRM155R61A475MEAA%23.html and 100nF https://psearch.en.murata.com/capacitor/...


2

Your tracing options won't make things any better if the board has high dielectric loss. First you need to remove all the nonsense like shown below: This serpentine doesn't do any good. Make the traces as straight as possible, no wiggles. 10ps delay due to length difference won't make any noticeable change in the signal. If anything, do the length ...


2

Coupling field strength generally falls off at distance squared. If you can make the parasitic loop length increase by less than distance squared (e.g. not a big circle, but linear), then, first order, moving the undesired coupling loop farther away is likely to be a win.


2

If you want the cleanest, then laminate the analog trace between 2 ground sections, those sections tied together with dozens of vias. If you cannot do that, then take the hint from a Howard Johnson book, where he states the Efield coupling ----- over a plane ----- to be proportional to 1/Distance^3 Now for the magnetic coupling over a plane ---- I don't ...


1

The small signal response starts to drop significantly after 100kHz, flat from 500kHz to 700MHz. You should be able to see signals of a 100MHz. It could be something else. I would test the transmitter with a detector that you know that works to make sure that it's not the transmitter.


1

The return current does spread out on the ground plane beneath the trace, so keeping the traces apart reduces how much of the return currents from both traces overlap each other on the ground plane.


1

1) It's extra parasitic inductance built into a trace. 2) No, there are many way's to create a transmission line. Source: http://www.gsm-modem.de/M2M/m2m-faq/transmission-line/ 3) Roughly 50Mhz, after that transmission line effects start to take hold.


1

I'll take a slightly different approach to the other answers and use a differential transformer as an example. These are common on balanced microphone circuits. simulate this circuit – Schematic created using CircuitLab Figure 1. A balanced microphone circuit showing differential (green) and common mode (red) signals. Note that the differential ...


1

We'll assume a bandwidth of 10 GHz. And a system noise resistance of 62 ohms. 10Ghz requires a (single pole) timeconstant of 16 picoseconds. For each 16 picoseconds of settling time, you will improve the amplitude measurement by 9dB (1 neper). We will assume your pulse flat-top has long enough duration to provide the amplitude resolution. The total ...


1

First of all, a latch is physically smaller than an edge-triggered FF, so it saves on die area and therefore reduces routing delays in general. Second, every time you use an edge-triggered FF, you add its setup time and propagation delay directly to the overall path delay. The latch allows you to "hide" the setup time and its propagation delay is less, ...


1

Some MPU output drivers have controlled-slew-rates that are set by configuration bits. ICs can easily produce 100 picosecond edges. But 100pS and 100 picoFarad loads will produce, given 5 volt edges, using Iout = C * dV/dT, I = 100pF * 5v/100pS = 5 ampere currents. Thus controlled slew is required to avoid collapsing the MCU rails and upsetting the internal ...


1

TL:DR 300MHz isn't really that fast. Signal integrity will be fine, but EMC may be an issue. Your looking at 300MHz, which isn't that fast. Assuming you're looking at single ended signals, rather than LVDS, and you have some reasonable checks in place on the communication, I can't see why you need to worry about a 6 layer for that, a four layer would do the ...


1

One issue is that the PECL output is an open-emitter BJT, and it is biased by the pull-down resistor on the output. Traditionally this is 50 ohms to Vcc-2 V. Or if it's not convenient to make a sinking supply at Vcc-2, then something like 180 ohms to ground with some other means of getting 50 ohms AC termination. To make sure all your outputs are biased ...


1

The big advantage of DDR3 over DDR2 is that it allows the address/ctrl bus to use fly-by topology instead of balanced T. Fly-by is the recommended and easiest topology for DDR3. Balanced T is still possible for DDR3, but it is discouraged. Write leveling and read leveling should indeed be able to handle your mismatched delays. That is not the problem here. ...


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