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Suppose, Vin=0 and Vo was 1. That means N3 has pulled its source terminal to logic high. Now as Vin increases gradually, and reaches the Vt of NMOSes (assuming all Nmos have same Vt), N1 turns on in saturation but N2 turns on in linear region (deep triode). Which means it conducts almost no current. So you have to even further increase Vin so that N1 able to ...


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Please use the following circuitry to replace Q6. The waveform was simulated on LTspice. You need to add one more (at least) BJT in order to get hysteresis. The green trace is 0 - 3.3V output. Edit So what else is different? – Phill Donn Q2 is "Base Common" configuration. The base works like (-) input of a OPA in switching mode, while the Emitter ...


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The question: From my humble experience, I have a feeling that someone much more experienced could think of a much better or cheaper solution compared to example 3. Therefore the question, how to convert (0-7, 15-18V) to (0, 3.3V), Or maybe if the above solutions are good enough, he could share his opinion on the dilemma of false triggering in example 2. ...


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