I2C is a communication protocol that operates over two wires. Voltage sequencing over those wires communicates between the I2C master (controlled by software) and an I2C slave (perhaps a temperature sensor).
Software does not usually directly manipulate the voltage sequencing of the wires of I2C (that would be called "bit banging"), but instead convinces ...
An Intel Core processor is attached with Direct Media Interface DMI to the Platform Controller Hub PCH.
The PCH contains all peripherals, like PCI, USB, AHCI, Display outputs all the stuff.
But also the SMBus (I2C) interface, which connects all the little sensors together.
The PCH makes these peripherals available in the address space via the DMI. This ...
So far I understand, Intel processors use specialized CPU instructions (IN/OUT) to communicate with peripherals.
Uh, this might have been true in the 1970s and 1980s, but really wouldn't even be very useful for an I²C peripheral, and incredibly intrusive for the programming of the CPU.
So, instead, there's some peripherals attached to a much, much faster ...
i just looked randomly at one datasheet of Intel Processor
[EDIT:] its a on-package Platform Controller Hub (PCH) datasheet
in the introduction:
and you also might see it sometimes under different name: (SMBus)
your question, how it looks like this is really good tutorial that explains it:
its just like this:...
PCs have several I²C controllers. Most prominently those for the DDC and those for the RAM modules' SPD. Sometimes temperature sensors and fan control is also put on I²C buses.
It depends on the board's chipset how to control those I²C buses. Most host adapters are very simple and consist of not much more than a clock generator, a shift register and some ...
I²C switches are called "I²C switches" because they can be controlled through I²C.
The I²C signals themselves are just plain digital signals, which are analog signals. So for switching I²C signals controlled with GPIOs, two-channel SPDT analog switches are the correct choice, and commonly used (because most of them are quite cheap (unlike the ADG1636)).
My go to approach for this is the PCA9515A which lets you independently enable i2C segments using discrete GPIO. It's like adding a SPI-like chip select (aka enable) to an entire I2C segment. As a bonus (or is primary function) it also supports level shifting between the segments. Unless I've misunderstood your requirements, which is a distinct possibility.
Ok, we'll need to clear up a few things:
A MAC address of a computer can be spoofed by an FPGA which can be programmed as a network controller.
Um, yes. But any modern (think: the last 20 years "modern") network card also allows you to freely configure the MAC address it uses, so I think you might be overshooting a bit here with your FPGA.
I can set ...
if you ask me the best thing is to look at each project with oscilloscope if you think it is critical. You can do the math, but... it is better to measure it :) because impedance (length of lines and so on) have a big factor.
There is a gif animation of effect of different values on my website:
As you ...
I'm seeing a couple of configuration problems.
You configure PB6/PB7 for open drain, but then you remap the I2C1 pins to PB8/PB9 and those have not been configured.
For fpclk1(which is your master clock/2) to be 25Mhz means that your running the master clock at 50Mhz, which is an oddball frequency. Are you running with an external or internal high speed ...
okay, thank you brhans for your comment. I thought I had taken care of that but the clock line was pulled high to 3v3, now it works.
thank you very much!
I also changed this line
valt = ((int16_t)val << 4) | (val >> 4);
valt = ((int16_t)buf << 8) | (buf);
You don't need the level shifters with the ESP8266; there are two different ways to do it directly (SDA connected to SDA, SCL connected to SCL):
connect the I2C pull-up resistors to 3.3V from the ESP8266. This works because the I2C bus is open-drain, so the signal swing will be 0V to 3.3V. The Vih (input high threshold) of the ATTiny85 is 0.6 x VCC, so ...
Looks definitely Okay
Here is the reference design or solution for the similar case from NXP:
One option was to look for the high voltage tolerant I2C Pins. Normally, in most of the MCUs you can find that information. The I2C pins will be tolerant to higher voltage ...