63
votes
JTAG vs SWD debugging
Electrically
Pin Count
JTAG requires 4 signal lines
SWD only requires 2 signal lines
2-wire JTAG interface specified in IEEE 1149.7 drops the pin count but doesn't seem to be widely available on ...
- 763
22
votes
Accepted
What is a JTAG?
It is like USB, SPI, I2C, and other "busses", and it has a number of popular uses, not limited to:
One in particular is in testing of silicon before too much is invested in each part, for example ...
- 8,260
13
votes
Accepted
FPGA non-volatile progamming
An FPGA (with some exceptions, which don't include the Cyclone family) does not have non-volatile storage, so it will lose its configuration when power is removed.
However, it can be programmed (by ...
- 128k
12
votes
JTAG vs SWD debugging
Old question, but none of the answers address the performance comparison. Although the feature set between SWD and JTAG (when using a CoreSight DAP) are near enough the same, SWD sequences are roughly ...
- 3,733
12
votes
Use of VCC and GND pins on programming headers
Well, you certainly must connect the GND pin so that the programmer and the mcu share a common ground.
The 3V3 pin is not necessarily there to power the MCU. Some programmers (eg. Segger's J-Link) ...
- 31.3k
11
votes
What is a JTAG?
JTAG was originally an interface used for testing PCBs after assembly. The IO lines on the chips could be controlled and read via the JTAG ports allowing a board test sequence to be performed. Later ...
- 21.7k
9
votes
What is a JTAG?
JTAG is somewhat an odd term. To begin, the term can specify a specific connector and protocol, composed of a clock signal (TCK), mode-select (TMS), and data in/out (TDI/TDO). This comprises a network ...
- 18.8k
9
votes
Accepted
How to connect Multiple JTAG devices?
Unless something has changed in the last 15 or so years, one must connect the JTAG devices in serial (daisy chain). Like so:
AN134 from Silicon Laboratories, Page 1, dated 12/2003!
To program each ...
- 3,333
9
votes
Accepted
Is there a standard way over JTAG to program a flash connected to an FPGA?
The real issue is that there are many kinds of configuration flashes.
Run of the mill NOR flash (the 25xxx parts, usually) simply has no JTAG so no luck.
The so called 'platform flash' (at least ...
- 8,251
8
votes
Extracting firmware using JTAG
Ah, JTAG. The standard that is universal as it is useless.
JTAG is a universal 'standard' primarily because it defines everything without really defining anything. Remember, it began as a way to ...
- 28.2k
8
votes
FPGA non-volatile progamming
While The Photon's answer answered my original question, I was able to figure out how to program the EEPROM chip in the board that I originally posted (EP2C5T144 Altera Cyclone II).
By plugging the ...
- 533
8
votes
Accepted
NRF52 Debug Connection - GndDetect and VTRef
I've managed to figure this out with a bit of looking at ARM's documentation, in particular the page about the coresight 10 connector. VTRef is connected to the voltage powering the chip, and ...
- 397
8
votes
How does JTAG program an MCU
How would JTAG program an MCU with flash memory?
In most MCUs, JTAG is not directly connected to flash. There is actually a stack of access methods, each with their protocol. A debugger / in-system ...
- 1,365
8
votes
Accepted
SWDAP vs CMSIS-DAP vs DAPLink
CMSIS is the generic name for ARM-specified infrastructure around Cortex processors. The project we know today as DAPLink actually started as mbedmicro/CMSIS-DAP, we can find multiple references of ...
- 1,365
8
votes
BOOT0 vs BOOT1 circuit design in STM32f103 (ST-LINK)
Right below Figure 10 of AN2586 it mentions:
Resistor values are given only as a typical example.
These pins can be tied directly to VDD or GND, but it is common practice to use resistors for a ...
- 2,494
8
votes
Segger J-tag vs J-link
I don't think a product named "Segger J-tag" exists.
There is a product named Segger J-link which is a JTAG and SWD debug probe.
- 4,612
7
votes
What's the difference between a commercial JTAG debugger and an open source FT2232H OpenOCD debugger?
The difference is in software & functionality, which affects the hardware greatly.
The FTDI JTAG cables uses a command set to produce JTAG signals. These are very low level commands, often going ...
- 7,238
7
votes
Accepted
What's the difference between a commercial JTAG debugger and an open source FT2232H OpenOCD debugger?
JTAG cables can be built around all sorts of stuff. Xilinx JTAG cables, for example, have a Cypress chip and an FPGA. Atmel cables generally contain an AVR microcontroller with USB support. They ...
- 40.8k
7
votes
Accepted
Is JTAG the standard way to program ARM processors?
I suppose he meant using JTAG, or is there another way?
Probably he didn't. ARM has their own debugging bus standard – SWD (single wire debug), that is very well-specified. JTAG, on the other hand, ...
- 90.3k
7
votes
Why are male pins used for in circuit serial programming?
Male headers are generally less expensive and, with exposed pins, less likely to pick up internal contamination (for example during washing of the boards) without the necessity of seals that have to ...
- 383k
6
votes
Accepted
What is the difference between programing with JTAG and USART interfaces?
The JTAG is a synchronous interface that uses built-in hardware to program the flash. The USART interface is an asynchronous interface that uses a bootloader, which is a program that runs in memory, ...
- 1,384
6
votes
Why don't certain pins on PORTC on the ATmega164A/324Pa/644PA/1284P work?
I wasted a lot of time on this. You need to disable JTAG with the fuse bits to use PC2, PC3, PC4 and PC5.
According to the datasheet
...
- 201
5
votes
Accepted
Configuring multiple FPGA using JTAG
I have used daisy chained Xilinx devices with no problems.
The key to programming the daisy chained devices is in the Xilinx iMPACT tool.
I think the tool should discover both of the devices in ...
- 2,832
5
votes
What is a JTAG?
JTAG defines a serial protocol, and some commands, to allow access to internal registers within complex ICs. This allows a tester to get observability and controllability in a standard way using few ...
- 161k
5
votes
What does "pins-out view" mean?
Quite simply, it allows (provided a test port at each end is provided) to test an interconnect.
Consider a complex processor that has a large flash memory; we want to know that it is both properly ...
- 22.1k
5
votes
Reverse engineering target chip to be used with OpenOCD
The JTAG specification (which is reasonably described on the wikipedia page) defines an IDCODE instruction as part of the mandatory implementation, and a scan chain intended for debug will typically ...
- 3,733
5
votes
Electronics before Linux
Before embedded microcontroller systems there were application specific ICs like SANYO LM8560 (alarm clock ic) and lumped logic like that used in the ROLAND CR-78 (drum machine)
Once microcontrollers ...
- 32.5k
5
votes
Segger J-tag vs J-link
Assuming that you mean JTAG by "J-tag" and Segger J-Link than: No, they are not the same by a far stretch.
JTAG is an interface that allows programming and debugging of integrated circuits ...
- 3,014
4
votes
Accepted
JTAG and additional external power supply
The ULINK2 page you linked in the question says this about the Vcc pin:
VCC Positive Supply Voltage — Power supply for JTAG interface drivers.
This means that the VCC pin on the ULINK does not ...
- 2,832
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