There is a better alternative to autoplace. I think autoplace is used to minimize board space, keep things closer together for auto-routing purposes, etc. If you just want to space things out so it's easier to manually layout your board and not worry about having overlapping identical components (ie: resistors), just do the following:
There are a couple question here, so I'll start with the various grounds.
Kinds of Ground
Standard ground symbol. If you don't have a specific use for the other symbols, then just use this one. More often than not, separating grounds will lead to trouble, so if you don't know that you need to do it, then avoid it altogether.
This is your "analog" ...
You can rotate components while keeping wires connected by clicking g for grab, then clicking r for rotate. It's very convenient.
But like you noted, it doesn't keep any right angles you chose, and instead connects them with the shortest route from the closest break-point in the wire. By breakpoint I mean some point that isn't a straight line.
I don't ...
I think an example worth a million words, so I wanted to make a tutorial on this.
Here is the box I am going to create an outline for:
Here is an example PCB drawing from the datasheet of the box:
After opening up Pcbnew, select the layer for edges. In the current version of KiCad (BZR4008), it is called "Edge.Cuts". First, I am going to draw the upper ...
As far as my understanding goes, you don't truly need a bus, to logically connect the signals at two (or more) locations. When two pieces of wire have the same label, they are considered part of the same net, even if there's no wire drawn between them.
The bus is more of a visual thing, to guide the reader through the schematic.
Here's how to quickly ...
Kevin asked me to write up a real answer. Here goes...
Mike's Footprint Guide
In most CAD systems, a part footprint (a.k.a. its decal) should focus on just those things that are immutable with the part. These should include, at the very least:
Copper pads for all solderable surfaces (pins, tabs, pads, balls, whatever). Even if something is not ...
I am going to explain this under Windows, however it should be quite similar to how it is when using Kubuntu.
What you should do is plot to a SVG file and then use GIMP to convert into any raster format, PNG in this case. You can use online SVG to PNG converters with ease, too.
Go to File » Plot » Plot
In the dialog, select "SVG" under "Format" and click ...
IPC-7351 specifies wider land patterns for chip capacitors than chip resistors, because capacitors are usually taller, so the solder fillet "wants" to extend further laterally. Using the slimmer resistor footprint with a capacitor can lead to reduced assembly yield due to tombstoning.
I don't know Eeschema, but I don't think the actual EDA software is relevant (especially since Eeschema supports multi-sheet schematics).
Don't try to cram too much on your page; give it some air. Net lines are much easier to follow if for every few lines there's some space between them. If your schematic becomes crowded you probably can divide it into ...
I have done it two ways.
Don't change the footprint file but draw a zone on the top solder mask the size you want the metal to be. Then draw a zone on the copper layer that is connected to the same net as the SMD pad. It is especially convenient if that pad connects to ground. Change the zone properties to Pad connection: Solid so that it will fill ...
Rotating a group requires selecting the group first. Note here I am selecting right-to-left which selects everything that touches the selection box.
Then apply the rotation
To answer your comment, let's say that your reference footprint is at 50,50 in x,y and you would like to rotate your group of footprints 10° about the grid origin, ...
You can split your design into a hierarchy (e.g. multiple pages), then have local nets to each page and also global nets. You can also use specific page to page connectors (so the page symbol is like a component you can drop into another page (over on the right hand icon set you will see an icon labelled "Place hierarchical pin in sheet" and another named "...
I solved this issue doing this:
Open CvPcb to associate components and footprints
Open Preferences -> Configure Paths
On "KISYS3DMOD" change the path to the correct one. "C:\Program Files\KiCad\share\kicad\modules\packages3d" in my case.
Restart the program.
That's why you should always place the mounting holes before you place your components :)
The good news is that the manufacturer will not have any issues making these holes. The only thing I'd suggest is to remove the plating.
Another way to do this is to define the "mounting slots" on the PCB outline instead of drilling. That way, you'd have greater ...
The easiest way is to use the "Position Relative To" command. On a Mac, it is ⌘-R, under Linux, it is Ctrl-R. Or, you can access it using the right-click on a part or group.
Once you have selected this, you can choose an object for the reference
You will need to be running version 5 or higher for this function.
You draw symbol the way your circuit is best readable and understandable. Techniques used are:
grouping pins into busses;
having space between pins groups per their purpose, usage or their connect destination;
making comprehensive labels on the pins and on the devices.
From my experience reading circuits drawn using packages is a nightmare. Packages belong ...
What you are looking for are sub-sheets (hierarchical sheets).
First, create a new one by going to "Place->Hierarchical Sheet". Once you click to place it, you will have the following dialog.
Here, the important thing is the "File name". This will be common for all of your copies of the buffer. The "Sheet name" will be unique for each copy.
The Gerber files do not specify the order of layers. As long as you don't use blind or buried vias, the layers can be stacked in any order.
The file names for the individual Gerber files may vary between different CAD systems, and may or may not imply the desired stack-up order.
I always included a "readme" file with my PCB order specifying the desired ...
I am not sure this is a good question for EE.SE, but here's how to do this in KiCad:
From the Design Rules menu select Design Rules
Choose the Global Design Rules. There you can modify available trace widths/vias.
The Custom Track Widths lists the available track widths (i.e. outside of those defined for specific net classes [see below]. And the custom via ...
The LM358 socket and the capacitors I put do not have holes. Only the resistors do.
You have selected an SMT footprint. Choose a through-hole footprint in the footprint association.
Why do the resistors have a yellow part (which a believe are the holes) and a red one (those that seem like parallelograms)? What are they?
The yellow part shows the (lack ...
The blue lines are busses. They do not connect signals without a specific naming convention (http://docs.kicad-pcb.org/5.0.0/en/getting_started_in_kicad.html#bus-connections-in-kicad).
Use wires (green lines) instead.
If you have many same schematic blocks you want to reuse, you can use hierarchical sheet like this: (Kicad-4.0.2-stable MacOSX)
Create a hierarchical sheet with sheet name A_1 , file name A.sch
Place your components and wires into this hierarchical sheet.
Add a new hierarchical sheet with sheet name A_x (x is 1, 2, 3), file name A.sch ( only if the file ...
I use Eagle and, despite its huge libraries, most of the time I prefer to create my own footprints since I can adjust them to suit my needs.
For example, I usually use a 0.25 grid and the 0603 capacitor as it is on the library doesn't allow a 0.25 mm trace to pass between pads with a 0.25 mm clearance without warnings so I redesigned the footprint so it ...
I typically use the footprint for a 0.1 inch pitch "pin header". You can then use either male or female connector strips, or just solder wires directly to the pads if you don't need to use a connector. But using the header/connector provides a convenient place to show where the external connections are in the schematic and on the board. But it does not ...
VCC and GND are meant to be power inputs. ERC on the schematic will check that all power inputs are driven i.e. have a power output somewhere on the net. It'll also make sure you don't connect two power outputs together. An example of a power output would be the output terminal of a regulator.
The idea starts to break down if you put passives (inductors, ...
Both methods are used, therefore both are "standard".
Which one you should use is a matter of opinion, and a decision about which one better conveys the necessary information to the person reading the schematic.
For the person trying to understand the logical operation of the circuit, grouping the pins by function is usually better.
For the person using ...