New answers tagged

0

No. LDOs are there to reduce any noise, disturbance on their input and provide a clean and stable output voltage. They are voltage regulators. Their stability also implies that they are slow. You can use a resistor divider as @transistor suggested, but then you might have other troubles depending on the capacitive load of the switch and on the node on its ...


4

A regulator is not a good option. Too slow and possibly not stable without capacitors. You could use a resistive divider, but another option is to use a purpose-designed level translator chip such as the 74LVC1T45, which can work from 1.65V to 5.5V in either direction. When converting 5V to 3.3 it has a propagation delay of less than 5.4ns over the whole ...


2

The resistive divider solution so the simplest one. Go ahead with those. If you see loading effects (sagging of signal transition) you can also opt for active clamping using zener diode or BJTs (consider the inverted logic, if it going to MCU it can. be handled, else invert it again..or go with Zener clamping or dedicated level shifter IC) depending on what ...


2

An LDO would probably not turn on in 100 ns (note standard SI units). Instead you can probably use a voltage divider. simulate this circuit – Schematic created using CircuitLab Figure 1. A voltage divider to convert a 5 V signal to 3.6 V. The resistor values were chosen for easy calculation. You can scale up or down but watch out for loading effect ...


2

In this case, can I use LDO to drop the voltage? No because virtually all (LDO or non LDO) regulators require input and output capacitors and, all voltage regulators are far slower in operation than that needed to main the signal's shape and edge integrity. Use a resistive potential divider.


1

High PSRR (>80 dB @ 0..50 kHz), low noise. Vin = 5.5V, Vout = 5V, IoutMax = 200mA. Dropout voltage preferably < 200 mV. That's a problem. Good PSRR and regulation both depend on the LDO's pass transistor characteristics. You'll get better performance if the pass device is fast, low capacitance, high gain, etc. All these characteristics degrade ...


0

The ADP7142(AUJZ-5.0-R7) seems to check most of the boxes. Not the highest PSRR LDO available, but this seems to be the most affordable one while meeting the rest of the demands.


16

It doesn't entirely excuse the poor performance of the MCP1700, but I think you'll generally find that very low Iq regulators tend to have much poorer high-frequency PSRR. You would not expect an op-amp with a very low quiescent supply current (a couple uA or less) to be very useful at high frequencies, and the error amplifier in the regulator is no ...


6

This is cheery picking functionality of a particular part. An ideal LDO has infinite PSRR so what is the limiting factor on real LDOs that degrades performance at high frequencies? I recommend you read this article to really understand noise in LDOs. Read this article to understand PSRR and don't confuse the two. The two are often confused and often people ...


11

My practice is to use a large enough capacitor before the LDO to handle high frequency ripple, with a small R or L before it if necessary, and rely on the LDO to remove the low frequency variations. That means both components get used at their 'best' frequencies, and I'm not requiring either to struggle to work where they are not so well specified. If the ...


-1

A quick skim of the linear regulator section of my Nat Semi data book turned up several ICs with 40 to 60 dB rejection above 100 KHz, so 'Dave' was cherry picking as you suspected. Just another reason to not watch videos; do real work on real circuits instead.


19

In the case of the MCP1700, Dave is certainly correct. Here's the ripple rejection versus frequency chart from the datasheet: The datasheet itself claims 44dB of ripple rejection at 100Hz, which agrees with the chart. It also clearly shows how poorly it handles high frequency noise. The LM317, on the other hand, gives you better than 50dB of ripple ...


Top 50 recent answers are included