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1

Here's what did to improve it when I designed the original circuit (showing my LTspice schematic because I don't have the patience to redraw it in Circuitlab). I simply added a complementary Emitter-follower output stage to increase drive current and reduce capacitive loading on R1. The graph is at 4 MHz. LTspice thinks it will work at 16 MHz, but with some ...


3

[error corrected 17:20GMT Sept 20] Suggestions on this speedup you are breadboarding a circuit intended to switch (at the input) 2v/100 = 20mA in 5 nanosecond. In 4" of wire (100nH), the VDD sag if poorly bypassed will be V = L * dI/dT = 100nH * 20mA/5nanoSec = 2000/5 * milli = 0.4 volts. Thus Ground plane and VDD bypassing (1/4" wide VDD strip) ...


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