41

There's a thousand things to consider to reduce manufacturing costs, but some of the important ones are Build in high volume. This spreads the set-up costs for a batch across more units. You'll find, for example, that the cost of board blanks drops extremely fast as you increase the batch size. Negotiate your component costs. List price is just a starting ...


39

Assuming white silk screen, just draw a solid box on the silkscreen layer. You can then write on it with a permanent marker. Here is an example from a board I made a while back: That was before I wrote on it.


33

That's called copper thieving. It helps balance the amount of copper on the outer layers which makes the etching process easier. Basically it helps them avoid over or under etching the board. Usually I'll have a note on my board files that I send to the fab house like: Fab may add copper thieving at their discretion so long as it is at least 100 mil from ...


27

If you don't explicitly document that these components are not to be placed, you will inevitably have your manufacturing team notice that there is a location on the board with no corresponding line in the BOM, and delay the build to send an engineering query asking what is supposed to be placed there. Explicitly documenting not-placed components avoids ...


26

Disclosure: I currently work for one of the manufacturers mentioned, I completed an internship with a second, and I know current and former employees of a third. I can't reveal specifics but I can give some general reasons why ICs have variable costs and prices. I also can't speak about the specific ICs mentioned -- even if I knew why my company's version is ...


23

It's most likely a type of fiducial marker, used by a pick-and-place machine to correctly place the SMD parts on the copper side of the board.


22

Although it's true that creating a chip is very expensive, TSMC and other fabs do provide "shuttle services" that put many devices from many people on the die and reduce the price significantly. I've even hear a company getting a few samples of it's devices for $1500, which is extremely low when you consider the alternatives. Before anything, it's best to ...


22

PCB production after stack up cure: Drill the hole. This is through the solid copper (un-etched) outer layers and feature etched internal layers (for a 4+ layer board). Copper burrs are removed in the deburring process. Melted epoxy resin is removed by a chemical desmear process. (Without this, you cannot get good plating coverage to the internal copper.) ...


21

Already some great answers here so I'll just add a few more things. Work closely with your assembler and your pcb fab house, they often provide dfm (design for manufacturing feedback) that will help you understand how to change your product to be easier for them to manufacture. The higher you go in volume the more concerened you will be about every little ...


21

Yes - but to a budget. For example, in the case of resistors, there are various tolerances available which tell you how much the actual ohm value may differ from the stated value. 5% tolerance used to be standard, these days 1% is not significantly more expensive. If you want a 0.001% tolerance resistor you'll have to pay more. Similar things apply to the ...


21

PCB size is not the only cost consideration and you need to consider recurring costs vs. one time (non-recurring) costs (some of the non-recurring may actually occur more than once for a 50k run). Note that using double sided techniques rarely (if ever) yield a PCB half the size of a single sided part - in my experience you may get one that is perhaps 40% ...


20

The ADuC 841 integrated circuit will work with either of two alternative crystals. The ADuC 841 evaluation board (for which the schematic notes have precipitated the question) has therefore been designed to take either of those crystals. It has footprints for capacitors C17/18, which depending on which crystal is fitted can be either populated or left ...


20

First off, use a 4 layer board. Not only does it make layout easier but inner ground and power planes provides a barrier against front/back crosstalk. Also, 4 layer is not much more expensive than 2 layer Second, lines crossing is nowhere near as bad as lines running parallel


17

When you release a design to manufacturing, i.e. Tape-out, fracture (mask making) and then lot start what is normal is that you start a ES (engineering sample) lot that is smaller than a full production lot (25) the size of this ES lot is dependant upon the fab, but is typically 12 or so. You then put in wafer holds at various points in the process. You ...


17

A common practice is to leave a square area on your PCB, filled with white silkscreen as a background. If you would like to write on the PCB with something other than a permanent felt marker (e.g. a ballpoint pen), a paper adhesive label could be placed over-top of the area. If you use an adhesive label, make sure that it's applied after reflow/soldering.


16

Adding to Dirk's Answer Be aware, mounting on both sides of a board may not buy you as much real estate as you might be imagining. When it comes to board density, your ability to route traces tends to be a critical factor as density goes up. More layers helps, but then you fill up space with vias. Double sided tends to make it MUCH harder to route unless ...


15

The Pick-and-Place version of the connector will have a piece of tape (probably something like kapton) over the open top end of the connector, or some other firm flat surface, so that a vacuum pick-and-place tip can grab onto it. After reflow soldering you'd need to remove this tape before the connector can be used. This pic (of a different connector, ...


15

The minimum area of the chip is determined by the most cost effective solution not the smallest physical possible cut. The smallest cut defect-free with a kerf is roughly equal to the wafer thickness and the slotted diamond saw roughly equal to 1/2 of the wafer thickness. Thus the question should be what is the cheapest way to process single diode ...


14

0.1% resistors are widely available. Digikey lists 59,000 part numbers. But the price is higher, like @ $0.04 in reel quantities, instead of $0.001 each for 5% tolerance. If your design needs high tolerance, and your market isn't sensitive to a few dollars of price difference, there's absolutely no reason not to design with tighter tolerance than 5%. At ...


14

You may be asking about a software-only solution but if you are able to add a cheap IC to your board, you can use a 'Silicon Serial Number' chip. These are tiny ROM chips that each device contains a unique binary number. Examples are Maxim's DS2401 (1-wire bus) and DS28CM00 (I2C) which have a 48-bit unique number. The number is unique amongst the all the ...


14

Most production programmers are capable of inserting a unique serial number into the programmed memory, its a process normally called serialization. This is a grab of the Serialization screen from an old Dataman programmer.


13

The basic answer to your question is that for 99.9999% of the applications of resistors, the improved tolerance would have no value. Circuits are generally designed to work just fine with 5% and 10% resistors. In the specific example you show, it really isn't the absolute tolerance of the resistors that's important, it's how well they're matched to each ...


13

Simply put, toe and heel are the areas of the solder joint that extend from the front and rear of the lead/pad. Think of a solder pad on your PCB as a piece of paper, and think of your hand as one of the leads coming off an IC package. If you place your hand in the middle of the piece of paper, the "toe" and the "heel" are the distance between the tip of ...


13

Semiconductors are fabricated using process technologies. The invention of these technologies has led the shrinking transistor sizes that have so greatly benefited the electronics industry. They have been shrinking so fast that the rate has actually been exponential, following Moore's law since their invention. In 1970, manufacturing processes reached the 10 ...


13

It's clearly to get rid of moisture, probably to keep the steam from pushing BGAs or CSP packages off the board (maybe from moisture trapped in tented vias, microvias or other places), but I didn't look into all the possible reasons deeply. You might want to be a bit careful with this- 24 hours exceeds the baking guidelines in IPC-1601, so solderability ...


13

Yes. You can write on basically any part of a PCB with a permanent marker. If you want, you can also use your silkscreen layer to provide e.g. a white background, or checkmark boxes etc. This is pretty common, eg. for boards that go through manual QA.


12

This is exactly why a BOM doesn't normally specify a manufacturer and part number directly. Instead, the BOM references in-house part numbers, and each in-house part number has an AVL (approved vendors list) associated with it. This level of indirection allows you to add (or remove, if necessary) manufacturers and their specific part numbers to the in-house ...


11

Cheap log potentiometers are a trick. In fact, lot of cheap log pots aren't actually log at all - they're linear pots with an ordinary resistor attached to create the effect of a log pot. This saves the manufacturers a lot of money, because they produce almost exactly the same product for both the linear and log pots, and just solder a resistor in there on ...


11

This is a no-brainer. There is absolutely no way that the cost of a pick and place machine spread over a few 100 boards will be cheaper than getting the boards assembled by a contract manufacturer. And, a pick and place machine is only one part of the assembly process. Are you going to get a reflow oven, inspection station, etc, etc, too? Added As Scott ...


11

You have to prove the parts are bad. They may be damaged by ESD. If you had only pulled the Q5 or Q3 and measured V(Q1-C), that would have isolated the part as the problem. Then verify R1 is 10k and not 10M or something else. The only weakness on the design is that the circuit turn off is slow and load reactance is unknown. Normally any FET (such as ...


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