7

Almost surely lookup table will be faster, but you shouldn't really be concerned with speed when you're talking about reading temperature, with a doubtless glacially slow thermistor at that. Unless you're talking about 1990s 4-bit mask-programmed micro running off a watch crystal, that is.


6

As an ultra simplified, 1st year EE model, you can consider a disconnected input to a CMOS chip to be an RC circuit. The tiny gate leakage currents represent the R, and the tiny gate capacitances plus the stray capacitance from the pad or pin to the outside world being the C's. Change the external EM field to the outer plate of the capacitor enough (ground ...


4

Have recently been characterizing an input pin on a PIC microcontroller. The pin can be alternately set to CMOS in/out, Schmitt input, or analog input. When set for Schmitt input: Data sheet specification of leakage current is +/- 5 nA. Measured leakage current at room temperature is less than 3 pA. Similar results were measured years ago on a different ...


3

I don't know that "faster" is your concern. The lookup table will always be faster, even assuming you need to do a linear interpolation between two entries (which you should do with integer math!!). The lookup table may or may not use more memory, keeping in mind that you might need to load floating point libraries to use the Steinhart-Hart equations. I ...


3

1) variable declaration. I have declare variable unsigned int Top_Display=0; if assign Top_Display=0123 display shows 0083 if assign Top_Display=123 display shows 0123 Some of the variable it take properly and some are not. if i assign value Top_Display=0129 it gives error digit is out of range. In C and many other programming languages, leading zero ...


3

A CMOS chip's input circuit generally includes both P channel and N channel transistors. If the chip is powered, then the (tiny) gate leakage currents can be in either (or both) directions: to ground, or to some internal voltage rail(s). The process variation may not allow one to pre-determine which direction of leakage is greater (unless the chip was ...


2

The behavior of these external interrupts is not part of the ARM architecture itself. This is determined by the individual chip manufacturers. The answer depends on whether the interrupts have the same or different priority, whether they are triggered by edges on the pins or levels on the pins, and what happens if a level-sensitive interrupt is serviced but ...


2

Assuming you store(MAP) the whole lookup table in the RAM memory there is no need to compute anyhthing further. This will be the fastest. The search will also be faster as the data is stored in ether increasing or a decreasing order. The MCUs depending on their capacities might try to match the speed but on an average, the look up table will be fastest.


2

It is not limited to MCU input pins. Also other CMOS chip inputs work like this. Basically the CMOS input stage is just gate terminals of two MOSFETs. FET gate is basically insulated, but gate needs to have voltage in respect to FET source for the FET to turn on. The FET gate is mainly few picofarads of capacitance load, and draws only very little leakage ...


2

The input impedance may be easily biased by leakage to some DC voltage or by trace capacitance to a mutual trace with a pulsed voltage. CMOS gates have very low input capacitance (x pF) which may be dominated by parallel traces with 10 mil track and gaps, but even far less if the input is floating near Vdd/2 unless there is a resistor driver. Thus it ...


2

Is any of these options better from the point of view of signal integrity/EMC? Assuming your RGB signals are somewhere between 1.8V and 3.3V logic and given the fact there are single-ended signals, they will be prone to emission. If this is indeed on your concern list, I would recommend a couple of options which I've used in my past experiences: Use ...


2

A number of SPI slaves can be connected in one of two configurations: Single Slave-Select daisy-chained Here the entire SPI bus is treated as one big shift register and the master must know the order of devices in the bus chain and their respective register widths. It is also necessary to write all devices at the same time in the same bus transaction. ...


2

UART is very robust when it comes to clock accuracy requirements. This is a consequence of the fact that each byte is processed independently and any time difference associated to clock mismatch doesn't propagate for more than 10 bits (start bit + 8 data bits + stop bit) in time. This analysis from Maxim concludes that 2% in clock frequency mismatch is ...


2

I often use the ATtiny13 for little one-off projects that blink LEDs or control timing of external switches (theatrical props). Sometimes I just need them to change an IO pin at a given frequency and literally nothing else. The following is a quick and dirty way to toggle a GPIO using a delay. Note: this is not a timing-accurate nor recommended way to ...


2

tl; dr version: The input impedance of a CMOS input is high, practically an open circuit. It needs to be terminated, either by tying to a supply or by driving it with a signal. It cannot be left floating. Why? A CMOS input is a capacitance: the gate-source capacitance on the input pair. Your intuition tells you that even though it is a capacitance, the ...


2

Yes, Possible I have seen it personally the app developed for our production line. The datarate we wanted couldn't be achieved. But the communication as such was complete. Here is a useful link if you are starting with mobile app development for Android. https://developer.android.com/guide/topics/connectivity/nfc/nfc


1

In this situation, we could say that the pin is in series with the (very) high input impedance of the MCU, which is eventually connected to ground. Where am I going wrong? You are going wrong in forgetting it is also eventually connected to Vdd, not just GND. So why would it eventually pull to GND over Vdd? simulate this circuit – ...


1

Most microcontrollers have a dizzying array of counter-timer features, and it can certainly be tricky to set them up how you want them. The critical information is in chapter 11. 8-bit Timer/Counter0 with PWM of the ATTiny13 datasheet. The place to start is with table 11.8 where you want a mode which goes from BOTTOM (0) to a number you choose OCRA (modes ...


1

The ADC has a built in capacitor at it's input. So, you should allow the capacitor to charge slowly to the actual value. If there is high resistance (LDR), it will take more time to charge. Since, you are switching the ADC to different channels, you should give sufficient time for the ADC sampling capacitor to charge. Provide sufficient delay after ...


1

Design first, code later. Plan everything out using logic, flow diagrams, state diagrams, etc. Your problems are with the logic, not the coding. Jonk has done 8051, I have not. I have done 6502 and 6800 assembly, these are similar. At first you might be tempted to have states based on physical position. But, an elevator really only has 3 states, going up, ...


1

When the pin is in high impedance, it presents as a very small capacitance (a few pF) and practically infinite DC resistance. The pin is vulnerable to noise coupling from outside sources because it takes so little charge to change its state. Noise coupling can be magnetic (inductive) or capacitive. The case of bringing one's hand near the floating pin is ...


1

If the input pin is floating and “short”, it is electric field interference that causes a voltage fluctuation on the pin. This may arise from electro magnetic fields but the problem is dominated by the electric field perturbations of that EM field and capacitive coupling to the floating MCU pin.


1

High impedance means in fact, very high resistance. And EMI can cause dislocation of little charges. Think of a clogged valve at a bike tyre. If you put your pump with an manometer on and give pressure, the pressure easily rises to very high values without performing a lot of work. When you release the piston of the pump the pressure will drop as fast as it ...


1

Shortly: Noise (outer electromagnetic signals) can create current over conductors. This current induces voltage across a resistor according to Ohm's Law. If the induced voltage is high enough then the input buffer will see this is logic-high. Likewise, if the induced voltage is negative enough then the input buffer will see it as logic-low.


1

Your reasoning is correct. The control of the LEDs should work as you describe. The Bus terminals that you describe are NOT actually bus terminals. Instead they are Logical Connections. They are used to indicate that a signal is carried to a different sheet / page / diagram within the schematic. In this form a 'box with a pointy end' (commonly called an ...


1

The BJTs schema states that if you write a 1 in LED_R, you enable the BJT thus turning the LEDs on. Is this correct? Yes. The second part: The symbols are called off page connectors. Normally they are sued when you can not complete the drawing of that particular net in the same page. The shape of the symbol depends on whether t shape is near the ...


1

Yes, your reasoning for the transistor circuit is correct. The input and output symbols are not universal. Sometimes they indicate signal direction, sometimes not. A good schematic (for westerners at least) should have inputs on the left side and outputs on the right side (western people think left to right). What is more universal is that connections ...


1

Multiple external interrupts will not chain together if the IO share interrupt flags which get cleared when handling one or the other. Read a specific manufacturer datasheet to see how multiple GPIO might share interrupt lines since it os overkill to have a dedicated interrupt for each GPIO. In general pending interrupts (not just external) should run when ...


1

When an active interrupt is detected, the processor will generally start processing instructions in a different location. This is usually a predetermined location or a location whose address is stored in a predetermined location. If an interrupt is being processed and another interrupt is detected: -- If the second interrupt is at the same or lower ...


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