# Tag Info

8

It's called a wettable flank to make the soldered joint easier to inspect. If part of the pad reaches the side, a correctly soldered joint with enough paste that reflows correctly will develop a little fillet on the exposed side. See figure 5 for "side wall plated": https://www.st.com/resource/en/technical_note/dm00298756-leadless-packages-with-...

7

Sounds like you need a bigger MOSFET or a higher gate voltage. 200W at 12V is 16A. The RDSon for that MOSFET is 13.1 milliohms at 4.5Vgs, let's be generous and call it 10 milliohms at 5V, so you're trying to dissipate 2.6W. The thermal resistance to ambient is 62C/W which is optimistic since that assumes you're on a 1 square inch footprint. All together, ...

6

Not just SiC. All high-voltage MOSFETs. There's no point due to how they are or would be used. SiC is for high voltage and the max gate-source voltage is the limiting factor when using a PMOS high-side switch to simplify gate drive. 30V is pushing it, let alone 600V. So for high-side, high-voltage switches you need gate circuitry anyways no matter what you ...

6

What is the purpose of R7 and R5? I think they are causing your problem. MOSFETs will dissipate more energy if they are only partially turned on. And the amount they are turned on/off is determined by the gate-source voltage. By placing resistors between the source and ground you make it harder for your gate signal to fully turn on the MOSFET. Current that ...

5

I see two possible solutions: Depending on your PWM frequency you might be seeing the capacitance from the LEDs. This might be normal. Try to removed the LEDs and replace with a resistor and measure the signal again. If it's a nice square wave then you have your answer. The MCU isn't charging/discharging the gate fast. Think of the gate to source junction ...

4

I don't know how you plan to lay things out, but whenever I do this (back-to-back MOSFETs with sharing gate nodes and sharing source nodes) I never have to run the gate or source traces under the hot or neutral traces at all. If you do that, then you don't really need to worry about the hot or neutral punching through the PCB layers to the MOSFET gate or ...

4

It happens because there is a diode in the circuit you built. Connected like that, the diode only allows the MCU to turn the FET on, but then the diode will prevent turning the FET off. So it turns off only slowly due to leakage currents. So while it is possible to put a diode like that, why would you do it as it makes very little sense to do so.

3

At least capacitor C6 is conneted wrong. It should be between VB and VS, as it should definitely not be on HO.

3

I believe the process of producing them is more complicated but I am not sure. They do have a higher on-resistance than N-channel MOSFETs this is disadvantageous due to higher power losses. So therefore most people prefer N-channel MOSFETS. Also, they are enabled when applying a negative voltage to the gate compared to the source (Vgs), N-channels can simply ...

3

You should really take some notes, or follow some tutorials on basic SPICE usage. You'd see then that the source, as you have it, is not set up properly for your requirements: a sine with a frequency of 1 kHz (initially) and an amplitude of 10 mV, for .TRAN (as noted by G36). Your value of 6 AC 10m means the source is set up for an .AC analysis of 10 mV ...

3

Yes that ESD protection is really neccesary and essential. A MOSFET is generally constructed like this: Note how there is an Oxide layer between the Gate and the rest of the transistor. This Oxide layer is a very good isolator so the Gate is completely floating. This means that if an electrical charge gets trapped on the Gate, it has nowhere to go. If that ...

3

The source-gate diode in the DMP3007 you reference is purely for protection from electrostatic discharge (ESD): This paper from Infineon implies that gate ESD protection is mostly intended to prevent damage before the device is installed on the PCB. Equipment that is exposed to ESD often may require gate protection while operating, though in that case there ...

3

You need (for predictable results) a logic-level MOSFET. One that has a specified Rds(on) with 4.5V or 5V drive (or lower is okay too), assuming an Arduino that has 5V nominal outputs. Eg. IRLZ44. • Logic-Level Gate Drive • RDS(on) Specified at VGS = 4 V and 5 V You also should have a series resistor on the LED. You can look up datasheets for most parts ...

3

I can offer a very simple way of thinking about using one of the two common areas, discrete circuits for switching. (The discrete MOSFET pretty much isn't used for analog audio voltage amplification.) For switching, the BJT looks like a voltage source/difference between its collector and emitter of a few tenths of a volt while the MOSFET looks like a ...

3

The proper unified symbols are defined by the International IPC standard and also IEEE Standard 315/ANSI Y32.2/CSA Z99 , which are books to buy. Yet there are a few opinions that reflect some of these in other answers. IPC symbols are the preferred solution. but based on IEEE standards in most cases. Since India has a free FOI policy, the IEEE std is ...

3

What you've built (or tried to build, see below) is a linear regulator. Its efficiency will be the ratio of Vin to Vout. In this case, assuming your 4.75V output target, the efficiency will be about 21%. MORE: Unfortunately, your design doesn't even work as a linear regulator. The reason why is that it has no reference to compare against to track the output ...

2

No, this won't work because you won't be able to apply a high enough gate voltage to turn off the high-side P MOSFETs. You need to bring these gates to 24 V to turn them off. You should be looking for something called an "H-bridge". You should be able find one device that contains all of the logic you need, and works with your desired voltages. ...

2

As the comments say, this circuit is terrible. More importantly, it's poorly-drawn. The MOSFET is upside-down, and both the MOSFET source and the BJT emitter are connected to ground. Here's what's going on: R3 and Q1 form a simple inverter that inverts the square wave output from the RTC. The inverted square wave is connected to the gate of Q2. When turned ...

2

I'll address your first point first: It's true that the parasitic capacitances of a MOSFET are significantly higher than those of a BJT. However, the BJT suffers from an effect known as saturation, where a buildup of charge carriers prevents the BJT from turning off for a fairly long time after you try to turn it off--and because saturation is the mode in ...

2

Gate drive voltage, RDSON, Gate charge, VDS max and VGS max are generally the most important parameters. Your FETs are a fairly close match in all of these. There is one marked difference between them; the NTMFS489NF has an integrated Schottky diode, while the NTMFS4C03N only has the usual intrinsic body diode. This is reflected in significantly lower ...

2

You aren't fully turning on the MOSFET since the source resistor is raising the source voltage. It's in between full-off and full-on and is acting as a ~21.5k resistor.

2

The current author talks about is the short-circuit current $I_{sc}$ relevant to transient power dissipation in a CMOS inverter. $I_{sc}$ flows from $V_{DD}$ to $V_{SS}$ when both PMOS and NMOS are conducting for a brief period of time while switching is happening at the input of the inverter. It is modelled/approximated as a spike within this time ...

2

multimeter is in series from the gate That's not how you measure voltage. Voltage is a difference in potential. All you're doing is inserting a couple tens or hundreds of MegaOhms of the multimeter input impedance between the driving voltage and the gate. The situation is static, so those are all DC impedances. Since the gate's input impedance is orders of ...

2

The leakage current of the IRF540 can be up to 250µA. Your measurements are showing 12µA, which is within the allowed range. The IRF540 is made for high current use (33A) - the "high" leakage current of up to 250µA doesn't matter for that kind of use. LEDs can conduct (and light up) at very low currents. You can find plenty of questions about LED ...

2

Having shortened and used larger gauge wire from driver to gate, and most importantly changing my probing technique (x10, shortened ground path) I was able to get a time that was more in line with my calculated estimate (~160ns with a gate resistor of 24Ohms). Probe ground was way too long; I attached my ground to a more suitable location. Below is the ...

2

Likely you don't have any non-overlap in the gate drive (i.e. you need a point where VGS is low for BOTH FETs just before toggling states). Another possibility (less likely) is that the gate drive is not strong enough -- as the drain V rises, it capacitively couples to the gate of the 'off' FET and turns it on again. In either case, if the transformers are '...

2

ESD to drain can result in gate oxide damage. If drain is exposed and gate isn't exposed, then put the TVS on the drain. [I see this technique in the professionally designed schematics.]

2

The MOSFET should have a maximum dV/dt rating in its datasheet. Multiply that rating with the FET's output capacitance to get the maximum allowed drain charging current. Any ESD current less than this current should not damage the FET and be dissipated via avalanche breakdown, which most FETs are rated to handle up to an often very large maximum energy. Let'...

1

Just to complement to Spehro's answer. You could have simulated the behavior of that circuit straightaway, using the DC-sweep analysis tool of LTspice As you can see, the output voltage is almost the same as the input voltage, so there is no limiting/protection provided by that circuit. Of course there is a difference from a real circuit: you omitted to ...

1

A single MOSFET can either protect against reverse polarity or it can protect against overvoltage. Because of the body diode, the MOSFET can only block voltages over a diode drop in one direction. It can conduct in both directions, but only block in one. From the MOSFET datasheet:

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