Hot answers tagged

19

When is a MOSFET more appropriate as a switch than a BJT? Answer: 1) a MOSFET is better than a BJT when: When you need really low power. MOSFETs are voltage-controlled. So, you can just charge their Gate once and now you have no more current draw, and they stay on. BJT transistors, on the other hand, are current-controlled, so to keep them on you have to ...


14

First note that the feedback from the output is connected to the inverting input of the op-amp. That means were dealing with negative feedback and the op-amp output will stabilise when the non-inverting input (1) and inverting input (2) are at the same voltage. At power-up Vout is zero as Vin begins to rise. The voltage at (1) will rise to Vref. Since the ...


14

Many MOSFETs are characterized to allow overvoltage and the subsequent breakdown of drain to source provided the energy limits in avalanche are not exceeded. Provided you don't exceed these limits the device will not be damaged and will perform to the manufacturer's specification. For example, this is a section of an IRFP254PBF power FET datasheet. Both ...


13

It is correct. You normally see PMOS connected like this to act as a reverse-polarity "diode". simulate this circuit – Schematic created using CircuitLab It has much less voltage drop than an actual diode and will protect currents from flowing the wrong way when the voltage is connected between the battery terminals are connected in reverse. ...


13

According to datasheet: But you're not driving the gate with 10V, rather it's close to 6-7V so RdsON will be higher. Note this is a guaranteed maximum value. Actual value may be lower. As Andy says in his answer, if the FET follows the "typical" characteristics graph, its RdsON will probably be around 0.7 ohms, but notice the text in the corner of ...


13

The threshold Voltage of IRF3205 is between 2V-4V and the Raspberry Pi gives signal of 3.3v that will be fine No. Gate threshold is where the MOSFET barely starts conducting. So if it varies between 2-4V and you are applying 3.3V you are at best barely turning it on and at worst you aren't turning it on at all. You use at least the Vgs listed to get the ...


12

Maybe you’re overthinking this. The diagram you show implies that there is a gate signal connection that is open. Rg is to ensure that the gate has a DC path to source (GND) in the absence of a gate signal. As you noted, this is needed due to the FET gate impedance being practically infinite. Rg isn’t needed if there’s a ground-referenced gate signal present....


12

So, why not just connect the gate to ground with a wire? How then would you switch it on and off? If the gate is permanently tied to 0V, you would never be able to tell this transistor to conduct. David Normal already discussed the value of the pull-down resistor. When there is no other input to the MOSFET gate, Rg ensures that it is sitting at 0V, and thus ...


12

The manufacturer says it is useful in "smart phones" and as a "load switch". The lack of any matching specifications would tend to indicate it's intended for switching only. Maybe a low-side switch for loads connected to multiple supply rails.


12

Your PFET is "upside down" (source and drain erroneously interchanged) and you are probably getting a path through the body diode even when it is off. Apparently in the device models you are using, the diode "defeats" the NFET.


12

Given the very low speed at which you are activating the MOSFET, it will spend considerable time in the operating area where it is dropping about 6 volts from drain to source whilst consuming a current that might be as high as 3 amps. I’m thinking here of the motor being stalled prior to the MOSFET turning on enough to get it actually rotating. It’s not ...


10

What does indicated time in below graph means? It's the length of time that the MOSFET can reliably conduct for the applied drain-source voltage and drain current. For instance, with a drain current of 10 amps, the drain-source voltage can be about 15 volts - that's a power dissipation of 150 watts and, that power can be "safely" dissipated for a ...


10

The ON semiconductor device is a NVD5865NL: - The other device: - Looks like it has the Alpha & Omega Semiconductor symbol: - I thinks it's the AOD409: -


10

M1 could blow up if the Gate Source voltage is too much. Autoelectric systems are full of spikes. Place a zener between gate source of M1 to clamp the gate below the gate source rating. For example if the Vgs rating is 20VDC then a 18Volt zener would suffice. Load inductance is always present. This causes drain voltage spikes at turnoff which could exceed ...


10

They got destroyed due to inductive kickback. The TVS diode is not a correct choice, you should use a schottky diode at that position. When the MOSFETs were switched off, the motor induced a high voltage, that was clamped with TVS, but these devices are meant to surge a short pulse, not to dump entire motor energy, so it has blown, consequently MOSFETs also ...


10

We don't "botch" them by the time they are sold. We've botched them long before you ever saw an IC with those features. I was working on 14nm SOI in 2012, and the single biggest reason that things don't get out into the wild is yield, but this does not explicitly mean that the transistor did not work. I was making FPGAs because it allowed me to ...


10

What is the advantage of using a chip like "CD74HC4050" in certain designs? The answer is smaller size, less power consumption, and lower overall cost (not just part cost). The CD74HC4050 has 6 circuits in its package. Lets compare it to 6 channels made from discrete parts. SIZE The footprint for the CD74HC4050 in the TSSOP package (including ...


10

The 100 Ohm resistor on the gate of the N-Channel MOSFET is there to stop any potential ringing. Ringing is caused by gate capacitance in series with the inductance of the track/wire. The 10k resistor is just a pull-up resistor to keep the gate of the P-Channel MOSFET high. Or so I assume as you haven't actually labelled the nodes of the P-Channel. Once the ...


10

No, it is not necessarily bad practice to have a MOSFET always on. They are frequently used as power switches. Since you only have N-channel MOSFETs, you probably want to do it something like this: simulate this circuit – Schematic created using CircuitLab This is called low-side switching. You have done that properly with your two elements, but you ...


10

Safe operating area. Repeat after me "look at the safe operating area graph": - According to the data sheet SOA graph for the IRF630 it would survive less than 1 ms with 5 amps and 160 volts across it. Looks like it managed to survive 3 ms though: - What´s is going on here? It's called operating the device below its zero temperature coefficient ...


10

They are connected back-to-back, for different purposes. Charge control, and discharge control. Look up the datasheet for the HY2120 protection IC used, and you will understand how they are used: The cell voltages are sensed through the VDD and VC pins, and compared to a fixed voltage. Take a look at this block diagram which is from page 5 in the datasheet. ...


10

You're at the limit of gate-source voltage (Vgs). You can reduce this by adding a series resistor between the NPN collector and the FET gate. Make R37 10k, and add the second 10k. Then the gate will swing between +12V (Vgs = 0V) and +6V (Vgs = -6V). Then the FET should be happy. Try it (simulate it here):


10

This design has a very high margin with good choices for On/Off margin. With 10:1 CTR on the design or 10% output and is well exceeded by guaranteed CTR. Keep in mind Vce loses gain when saturated and rises above 0.5V quickly to 1V at which point the worst-case FET leakage is guaranteed to be Id=-250 nA max where it is possible that 2mA LED drive "...


9

It’s mostly about convenience. Low-side drive like the NPN shown can be controlled directly by ordinary logic levels yet can manage a higher controlled voltage (like the +12V shown in the example.) A PNP (or P-FET) can be used to switch on the high side, if the switch supply is the same or lower than the logic level. Example: simulate this circuit – ...


9

Bipolar transistors had a head start of about ten years over MOSFETs so they were adopted first. They were, and remain today, somewhat less expensive than MOS to manufacture, at least for discretes, because they require fewer process layers. Although eclipsed by MOS for logic some time ago, bipolar devices and techniques are still widely used in power, mixed-...


9

Your approach is ultra sensitive because you are driving the gauge open-loop. The opamp circuit has a fixed gain, but it is driving a FET running wide open. Its transconductance changes with temperature, the voltage from drain to source, the phase of the moon, etc, all adding up to no real stability. There are several ways to improve things. One is to ...


9

When talking about MOSFETs on an IC, these mostly have a symmetrical structure like this: Picture from here. Note how Drain and Source are physically identical. When using these type of MOSFETs (so when designing a circuit that will be etched on a chip!) then the direction of the current defines which area we call source and which we call drain. In some ...


9

Which revision of the datasheet are you using? I see 1.0 W listed for 25 degree ambient. Anyhow, the PCB material itself if very bad at dissipating heat, you need copper planes to do anything. The DMP3007 has a listed thermal resistance of 124 K/W with minimal copper area and 52 K/W with one square inch of copper. At 0.7 W and minimal area, you are looking ...


8

I don’t have an updated design in mind, but the problem with fast switching parallel FET is the Miller capacitance can vary with Vgs(th) e.g. 2~4V and when the loads switch the current sharing can result in overheating or worse shoot thru with a complementary driver and insufficient deadtime. However when within the same chip, they tend to be very well ...


8

A linear regulator is a lossy delivery system especially when coping with high load currents. No matter what output transistor you choose, the same heat power will be generated. So, if you stick to linear operation, the only option is to provide a better heatsink to remove the heat power more effectively and thus lower the temperature of the transistor. Or, ...


Only top voted, non community-wiki answers of a minimum length are eligible