New answers tagged

1

In single device amplifier topolpgy the term "common XX" means terminal XX is at AC ground. Various biasing techniques may end up with terminal XX with a DC voltage, but they will be AC ground or "common". As a current source has infinite impedance it makes no sense to place it between the common terminal and ground (in the AC analysis circuit) In the above ...


0

If the output is suddenly shorted the zener current is not limited. It will carry the charge current of the 4.4uF level-shifting capacitance. Something similar might happen if the higher supply voltage is suddenly applied and the load is low-Z.


0

The IRFB3006PBF should work fine although it's QUITE an overkill, pretty sure the datasheet you linked is for a different transistor though (that one should work fine too and I think that's the one you meant to ask about). The graphics in the datasheet should help you determine how much current can the the unloaded transistor pass at a given GS voltage, in ...


2

Examining the performance, you may need a better GateDriver IC, or a lower inductance IC package, or better Ground/VDD PCB layout to reduce inductance. Also a Ground Plane may prevent this 'negative slope'. This region should vary as the input VDD varies, because the slew-rate across drain-gate will vary. simulate this circuit – Schematic created ...


3

You need to distinguish between large signal and small signal. Suppose your input is a DC value VIN. This causes a DC current ID which is calculated with your equation. Now, suppose you add a small signal to this: Then you can use Taylor's expansion to get an approximation, which will yield: iD = (what you have) + (derivative, evaluated at the point you ...


1

My MOSFET was broken after all, I got a replacement and now it works fine!


29

It is an amplifier because you put a wiggly signal in, and you get a bigger wiggly signal out. The fact that the output wiggles down when the input wiggles up is a trivial detail, that -- if it's a problem at all -- can be solved in any number of ways (not least of which is following one stage by another, because two negative gains, when multiplied, result ...


0

1) The current rating of a gate driver is how much current the driver can drive into the gate. During switching, the gate draws current - the more current you can supply, the faster it will switch. You can think of it like a capacitor - you need to charge it to reach the threshold voltage. The more current you supply, the faster the voltage will increase. ...


0

When ı search gate driver for low side Igbt always I saw current rating. You probably mean the: Output high short circuit pulsed current You're right in that a gate doesn't draw current when it is on or off. But what happens when you switch it on to off and off to on? Note that the gate of an IGBT (or any other device with a MOSFET input) will behave as a ...


0

IGBTs need quite some energy to switch, you need a high voltage to push in all the electrons needed to charge the insulated gate, which has quite same capacitance, thus a high current is needed to do that quickly. Of course this current is only needed until the gate is on it's desired potential, no static current will be drawn.


0

I tried my best to do this with minimal components. The 4v7 zeners regulate the voltage drop across the FET gates. I added diodes on the Source and Emitter nodes of the transistors to ensure the OFF state, always good practice especially with FETs. The series resistors on the Collector of Q2 and Q3 set the correct Zener current needed. Without them the ...


0

You are using the wrong FET for your application. The IRFZ 44 is a "standard" gate drive FET, and will not reliably turn on with 5 volts of gate drive. If you go to a data sheet, you will find that Vgs(th) (gate turn-on voltage) is 2 to 4 volts. However, this only guarantees 250 uA of current, which is much too small, like 1/1000 of what you need. The fact ...


4

Because the N-channel MOSFET can carry higher current and it is cheaper then its similar size counterpart P-channel MOSFET. N-ch MOSFET can be used also as high side switch, but it requires an additional charge pump. The shunt is placed on lower side, because the common mode voltage would be too high for the operational amplifier. Again, it is possible to ...


0

The fill factor, or FF as you wrote, is defined as the maximum power point for the solar cell divided by the product of the open circuit voltage, \$V_\text{OC}\$, and the short circuit current, \$I_\text{SC}\$. So your entire equation boils down to \$\frac{P_\text{max}}{P_\text{in}}\$, which is actually where it all started out. The logic is circular and ...


0

To power up a device it mat be active low logic or + 5V low resistance but unlikely 0V low resistance. Thus to need to consider a high-side switch with a PCh FET Driver Whether you want a non- inverting or +ve logic function means the input need to be an NPN common-emitter to perform also as a level shifter .


1

If you have the ICs already in stock (or in mind), then it is perfectly fine to go with those ICs. As a good design practice I would first check basic need of voltage level translation. The chosen IC is for the same purpose. The other minor things you should also look at is: Power consumption Maximum operating speed Behaviour during floating input signals ...


0

As follow up to Elliot Alderson where he says: "input capacitance of the driving inverter is relevant." You find this when adding buffers on an ASIC. Buffers on an ASIC come in different drive strength: 1x, 2x, 4x, 12x etc. This is achieved by simply putting two or three 1x buffer in parallel. Thus a 4x buffer has four times the driver strength of a 1x ...


1

The propagation delay depends most significantly on the load capacitance, which is gate capacitance of any transistors that are driven by the output signal as well as the capacitance of the wiring that connects them. As you said, the propagation delay also depends on the power supply voltage. The propagation delay for an inverter is not really dependent on ...


0

Not a full answer but you also have to consider the spectrum of the illumination. Higher bandgap gives higher voltage and thus more energy per electron released by a photon. However if the bandgap is higher than the photon's energy, the photon won't release an electron. This is exploited in double-or multi-layer solar cells, where different layers have ...


6

There's no general "A is better than B", in engineering, ever. Your senior pointed you to a four-pin MOSFET for a specific reason – that might the ability to carry away more heat from the package, higher current rating, better mechanical mounting, easier solderability, a large stock of exactly these in the basement that's basically free … ask them! It's ...


2

You're building an inverter with the 2N7002 and that's a perfectly fine design choice. You're driving Q3-gate to logic 0 which happens to achieve 0.3V instead of the expected 0.0V. That in itself should not be an issue. But the low voltage at Q3-Drain doesn't make sense at -0.1V, i.e. it's not inverting. First, verify that OTG (pin 8) is configured as an ...


1

The notion of "resistance to which it discharges itself" is not very meaningful. It's better to think about the path of the current. When Vin goes to 1V, the left end of the MOSFET becomes the source and the \$V_{GS}\$ is a high voltage so the MOSFET becomes conducting. Current flows from the capacitor, through the MOSFET, and into the voltage source. In ...


0

Yes. You are correct, if they all have the same cros sectional area and same doping concentration in the semiconductor. For a MOS capacitor, the capacitance value in inversion region is given by the the series combination of insulator capacitance (\$C_{ox}\$) and the semiconductor capacitance in inversion (\$C_{s}\$). Since all the three capacitors have ...


3

If you don't mind small packages and having to order through a major distributor... If you can work with a small (TSOT-23-8 with a 0.65mm pitch) SMT package (or use a suitable breakout board such as a Capital 33608 or Proto-Advantage PA0089), and don't mind spending a few bucks on this, then I would use a LTC2954-2, a logic-level PFET, and a handful of ...


0

When something stops after around 5 minutes, you should check your micros() calls. When this happens after a month, millis() can be suspicious. So check out Baldengineer's millis tutorial about rollovers: https://www.baldengineer.com/millis-tutorial.html (I would, but your code is not here.) I guess your code tries to reach a millis value that's not ...


0

Based upon your question, it would appear that you had one channel set to a particular dim level, and the other three channels were off. If the one lit channel was maintaining it's dimmed level prior to your resetting the circuit, it would indicate that the PWM was working properly, and that the controller was simply ignoring or not responding to commands. ...


1

In situations where something has worked for a long time (days) and has suddenly stopped, it can be difficult to tell exactly what happened. As far as flaws with your circuit (that would make it suddenly stop working after a month), the photodiode is the biggest thing that looks weird to me. Not to mention (from a terminology standpoint) "Comm" or Common ...


1

From your data sheet, the on resistance is in the single-digit milliohms, as long as you keep your gate voltage up and keep the FETs turned on "hard". Your concern would be if Vgs ever drops to below 4 volts or so; then your on resistance would start to increase and you would start heating the switch FETs. Note that data sheet states that the Gate-Source ...


2

There must be some current flowing or the switch/relay will have no effect. You should measure the current flowing when you close the switch. If you want to use a MOSFET then you need to check the voltage across the terminals when the switch is open, but I strongly expect that this will be a sufficiently low voltage that almost any MOSFET will meet the ...


0

Well, here’s a simple way: use a 10A PTC resettable fuse. Like these: https://m.littelfuse.com/~/media/electronics/datasheets/resettable_ptcs/littelfuse_ptc_radial_leaded_ruef_datasheet.pdf.pdf


1

None of the PWM chop approaches really work, be it high-side or low-side. Why? Because the chop disrupts the motor control IC and messes up the tach signal. What this means is, you need a different approach to controlling the fan speed than duty cycle: you can regulate its current or its voltage. I faced this issue a while back on a RAID enclosure with a ...


1

This is not a very good solution because of the power dissipated on M2. Let me elaborate... To turn M2 on, you need Vgs>Vth. The FET you chose (CSD17382) has a very low Vth, 0.9V, what is a good thing. It's fair to assume that Vg=12V (when M1 is off) since the gate current is negligible. So, in order for M2 to have Vgs=0.9V, it needs to develop a 0.9V drop ...


3

In this configuration, the maximum voltage you can get across the load resistance will be equal around: \$12V - Vgs = 10.5V\$. Also, the power losses in the MOSFET will be higher than normal. \$P_{tot} = V_{GS}*I_D \approx 1.5W\$ instead \$P_{tot} = Id^2*R_{DS(ON)} \approx 65mW\$ I recommend adding a MOSFET bootstrap circuit and a Zener diode to limit ...


2

You're exceeding the Absolute Maximum Ratings with respect to \$V_{GS}\$ for M2. You can solve it by using a voltage divider. Typically, a disadvantage of using a NMOS as high side switch is that because the voltage at the source (almost) equals the voltage at the drain when it is conducting, you need a gate voltage that is higher than voltage at the ...


1

C6 is unusual and would usually be detrimental. R1 is on the high side and especially so if C6 is installed. Gate time constant = Trc_= R1 x Cg should be small wrt switching times but not very small. Related: Move D5 to immediately physically adjacent to Q1/Q1A - as close to the GS leads as possible. It clips negative gate ringing peaks and takes energy ...


0

As the voltage across a LED drops down through the forward operating voltage the current through the LED drops non linearly and very quickly. If self and stray capacitance is maintaining even a small current the LED can remain slightly lit. How bad the problem is depends on the operating parameters of the LED. Using a pull down resistor is an acceptable ...


2

This is sometimes added if a specific instance is susceptible to dv/dt turn-on (layout, lower current drive, installation). A collector-gate current, via the parasitic capacitance: Ccg flows at every switching event. If the gatedrive does not have enough drive capability to absorb this charge then the IGBT can inadvertently turn on. By adding a capacitor ...


0

For a current source the small signal impedance provided by it is ideally infinite. In case of transistor implementations, it is crucial which terminal we are "looking into" when we are defining the small signal impedance of the current source. If we use an nMOS between Vdd, and a node to which another MOS perhaps is connected, we would be measuring the ...


2

Thank you for the confirmations. File under Death by cheap iron. I will most likely throw away the thing. The other iron might be cheap, but it is grounded and has 100% success rate. Now I read your suggestions I think everything is obvious at this point. I think this is the last time I take a shopping recommendation from my collague.


1

This is a common mistake. Let's check the MOSFET datasheet: Notice RdsON is only specified for Vgs=10V. Typically this means that some of these FETs may turn on when driven with 5V Vgs, but not all of them will, and most of them will be in linear mode, with a high RdsON. In your application, they will burn. So when you want to drive a MOSFET with 5V, make ...


2

It looks like the mosfets are not the issue, but the gate driver. The Arduino output drives an emitter follower transistor, which means the FET gate goes only to about 4.3V. It is not enough to turn the FET fully on and the FET heats up and burns.


0

Here are two NMOS based analog muxes. I don't know how your resistor network looks like schematic wise, but I suppose you know how to glue it all together and make it work. So I'll leave that problem to you. Link to interactive simulation You can make a transmission gate (TG) by tying 2x NMOS's source and gate together. If the input lives between -5 V ...


0

the source of your MOS-FET needs to be connected to the reference of the 5V supply of the arduino, your schematic does not show this connection. without it the gate voltage is floating so it will be very unlikely to ensure turn off while floating. You always apply voltage as a differential so a single connection, the gate needs the output, but also the ...


0

This is done quite often, especially on bigger ICs incorporating several half bridge drivers. Unused half bridge drivers can be used to drive single MOSFETs.


1

You could use a device like the TI TPS25940A eFuse to improve the circuit. It has current ramp rate control for cap charging and programmable current limit. This particular part has a minimum current limit of 0.6A it looks like. But you can probably find a similar part with lower current specs. It will be cheaper too. The eFuse voltage drop should be very ...


-1

While not relevant to the example given in the text, very relevant to the question (by title as is): SOA. There are various physical layouts of MOSFET chips, of which some can, some cannot deal well with being operated continously in the linear range of their characteristic at significant power. This is important when linear amplifiers or linear power ...


3

Seems like you've damaged the gate of Q2 by ESD or similar effects. It's a bad idea to expose an unprotected MOSFET gate to external connections, particularly a small MOSFET such as a 2N7002. A series resistor (eg. 1K) and something like a 5.1 or 6.2V zener from gate to source will protect the MOSFET from most reasonable transients. simulate this circuit ...


0

It looks like Q1 is connected incorrectly...the source and drain are reversed. As shown, the body diode is always forward biased so the voltage across the MOSFET should be less than 1V, always. I realize that this does not explain why Q2 is failing, but it makes your whole schematic suspicious.


2

Yes, that could work fine, provided you have accounted for the Vgs drop (threshold voltage) for the FET vs. the relay pull-in voltage. Otherwise, use low-side instead. For a small coil that’s on your board this is the easier choice. Put the diode directly across the coil if possible to minimize the flyback current loop area, regardless of the switch method ...


2

Some misconceptions need to be corrected: 1. The flyback diode does not send current back to the power source. The power source is irrelevant. The flyback diode gives the current in the inductor an "easy" path to continue to circulate through the inductor. When current is interrupted in the inductance, it uses the energy stored in its magnetic field to ...


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