New answers tagged nmos
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MOSFET failure in a high power AC-DC SMPS buck converter
I'm also worried about the optocoupler. Use an >= 1MBit digital coupler here and split up the connection between ESP GND and SMPS GND for your own safety.
Another issue may be, that the voltage ...
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MOSFET failure in a high power AC-DC SMPS buck converter
My advice is you to get a proper working voltage equipment. All you need is a 10:1 or 100:1 probe. Otherwise you are working on the assumption your test circuit represents the real thing, and that is ...
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Could we use holes in an NMOS?
In an NMOS, the source and drain are N diffusions. When a channel (electrons) is formed, you can imagine a continuous conductive sheet is formed between S and D at the top surface of the channel.
If ...
- 12.4k
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Accepted
Could we use holes in an NMOS?
In a N-channel MOSFET with Vgs = 0, there is a depletion region between the source and drain N+ regions and the P-type substrate that is a barrier to current flow. In normal operation with Vgs > 0,...
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Simple NMOS transistor circuit output impedance
simulate this circuit – Schematic created using CircuitLab
Vtest and Itest is related as:
Vtest = (Itest + gm1.Vx).rds1 + (Itest - gm2.Vx).rds2
Assuming transistors are identical, gm1 = gm2, ...
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Water level indicator using CMOS inverter
As previously stated by previous answers, I also think there are a couple of errors on your circuit, mainly the fact that you don't consider the conductance of water, thus the transistors may not ...
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Water level indicator using CMOS inverter
Two things.
you don’t need inverters. Only one FET is sufficient.
In your diagram you could dispense with the n-FETs.
add weak pull-ups to your inputs
The FET gates need some kind of pull-up when ...
- 40.2k
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Water level indicator using CMOS inverter
This won't actually work.
When the water reaches each electrode, the voltage will be pulled low, the corresponding inverter will be high and its LED will illuminate.
But when the water has not reached ...
- 12.4k
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How do you go from gate level to transistor level?
I am having trouble remembering the exact details from this college course I took a few years ago, but we had a unit about combinational logic and creating custom gates using CMOS.
I believe the way ...
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How do you go from gate level to transistor level?
Obviously with your formula you know there is an AND gate, an OR gate and a NOT gate. Then you write down the truth table of each gate. I will just explain the AND gate : the only combination of ...
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