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11

You seem to want to interface to an USB port, so you will need some form of USB interface. The easiest route is an off-the-shelve usb-serial converter, then a max232 or the like, then the UART of your microcontroller. You apparently want to step beyond this. A next step is to use an usb-serial converter chip, without the extra stage of going to RS232 levels ...


9

While not specifically the answer to your question, in a similar situation faced on one of our product upgrades, we used a workaround: An identically addressed I2C device needed to be added to the design, but conveniently the parts had Chip-Enable lines. So the design simply added a CE off one of the controller GPIOs - actually we added 2, so that we could ...


7

Okay, I figured it out actually. I should have googled a bit deeper. It turns out that SD cards don't act exactly like SPI devices when sharing a bus according to How to Use MMC/SDC: In the SPI bus, each slave device is selected with separated CS signals, and plural devices can be attached to an SPI bus. Generic SPI slave device drives/releases its DO ...


6

Actually, it's a bit of a misnomer; there is some on-chip ROM containing boot code and a small one-time-programmable (OTP) ROM for the application to use (serial numbers, configuration data, encryption keys, etc.) But there's no on-chip nonvolatile memory for application code (it seems they wanted to use the chip area to support more SRAM instead), which ...


5

The file is a straight binary file. So, the first four bytes are the initial stack pointer value, the next four bytes are the initial program counter, and the interrupt vectors follow. As an example, here are the first 32 bytes of a known-good file: 00 08 00 10 99 3c 00 00 21 40 00 00 25 40 00 00 29 40 00 00 2d 40 00 00 31 40 00 00 9a 7a fe ef The word ...


5

Pin one is in the one you indicated. Lower left in your picture. That is how I would read the indications given on page 8 of the datasheet. Additionaly, pin 1 is usually the lower left pin when the chip is positioned to read the markings. This isn't always true, but it is generally how it is done. In this case, it also agrees with the datasheet and dot ...


4

This is the official ARM Cortex JTAG/SWD connector diagram: You should follow the data sheet/user manual about any resistors that are required. SWD pins on other LPC chips are usually pulled up internally. The LPCXpresso IDE might be defaulting to the SWD interface. You need to select the JTAG interface, which is probably what the LPC4337 uses initially.


4

USB ID Trace >> 6 mil gap>> USB D+>> 10 mil gap>> USB D->> 6 mil gap>> USB VBUS This doesn't sound like a good idea. I'd recommend for other traces, like VBUS and USB_ID, to be further away from D+/D- than D+ and D- are from each other. Wit 10 mil spacing and a 4-layer board, it's also unlikely that D+/D- are actually working as a closely coupled ...


4

In general, the IRC oscillator is not precise enough to use for USB. This is why the LPC13xx series has a separate PLL for USB. Quoting document AN11392: Guidelines for full-speed USB on NXP's LPC microcontrollers: When using a full-speed USB peripheral, it is important to use an external crystal, or a tight frequency tolerance ceramic resonator, for the ...


4

The ! operator in C is a logical operator and it produces a result which is either true (1) or false (0). You seem to be looking for the bitwise NOT operator which is ~, not ! The result of !(0b0011111) is simply 0 (or 0b0000000 or 0x00 or however you want to represent it), while the result of ~(0b00111111) is 0b11000000. Even if you correct this, you ...


4

Disabling the interrupt when you have no data to send is exactly the correct approach to take with a hardware I2C master controller. When the data is available, re-enable the interrupt and you'll immediately take it, which will transfer the byte to the controller.


4

These antennas are from NXP evaluation boards. These metal parts lower the field-strength output because of the induced eddy currents. They also detune the antenna and the matching network quite a bit. Without doubt the antenna would perform better without these metal squares, but NXP put them in to show that their NFC solution will work in a real-world ...


4

It is usually a very, very bad idea to use FatFS from interrupts. The most common pattern is to acquire the data in the ISR, store is somewhere and have a main loop task that stores that queued data somewhere. If your SPI driver uses interrupts and you don't enable nested interrupts (advanced topic), then your SPI interrupts won't run until the timer ...


3

Use SGPIO. It contains 16 shift registers with 32 bits each and is very flexible in what it can do. You can chain up to 8 registers or run up to 8 inputs or outputs in parallel.


3

first off thanks for looking at my long post and offering advice! Just now I found the root of my problem, the reset button was wired incorrectly holding the LPC4337 permanently into reset mode, this made it impossible for the chip to startup, I have since removed the reset switch and got the board running. It actually draws the right amount of current and ...


3

I popped open your board file. Lots of issues: You have rooms everywhere, and they're all enabled, and you're not using them. This is making everything show up as a DRC error. If you're not using them, turn them off. Once you turn off the rooms, you still have LOTS of DRC violations. You need to build a sane set of design rules. Generally, you go look up ...


3

The table contains the minimal value for IOH but not the maximal value. What is that supposed to mean? Note that this is the "current with voltage drop less than 0.4 Volts". The Minimum value is the only one of interest in this case - this has to be taken into account for the following logic. The maximum cannot be higher than the short circuit current, btw. ...


3

The best way to look at the issue is that the VCO (Voltage controller Oscillator) can be very sensitive to voltage ripple and spikes which translates directly into jitter. the key to a good PLL is low output jitter, but there is a a compromise, a low jitter PLL will also be slow to lock. So contrary to what Andy has to say, you must run the PLL at as high ...


3

According to this schematic, the pin you are using for CLKOUT is P1.27, which is used for the Ethernet clock enable (ETH_OSC_EN). This is pin 43 on the LPC1768 chip and goes to the enable pin on the Ethernet oscillator (ASE-50-C-T). It does not appear to be broken out anywhere else on the board, so you will have to solder a wire to it at one of those two ...


3

THE OBVIOUS METHOD is to use the built in bootloader and [flashmagic] to erase it via the serial port. I'm guessing that you already considered and rejected this method, possibly because your board doesn't give you access to both the serial port pins and the boot control pin(s). The LPC2368 overview suggests the bootloader also works via USB. I didn't ...


3

The natural successor of the 68000 range of CPUs are the ColdFire microcontrollers designed for embedded platforms. They have sort of the same ISA, but some instructions are removed and some have been added. This means that they are mostly binary compatible, at least in user mode, but some instructions have to be trapped and emulated if you want to run ...


3

+1 for @filo, who correctly addressed the problem of nested interrupts either not enabled (or having the same priority, therefore not being triggered). However the problem is not with the SPI (which typically is not used with interrupt on the FatFS, unless some heavy modifications are done in the code. The SPI is used in polling, with the xmit_spi() and ...


3

The PN7120 is normally in a low power mode. In the datasheet it says that the chip has "wake-up on address only". You need to first send it just an address only I2C transaction to wake it up, and then quickly send actual I2C transfers before it goes back to sleep. Sending two i2cdetect commands close together simulates this. See this thread for someone ...


3

What would have happened at the ADC input pin due to this mistake? It's likely that an ESD event occurred - maybe the circuit was unearthed and had attracted some charge (not a problem by itself but you have to know how to handle these events). The worst thing you can do is earth one single pin and, by the sounds of it, that is what happened when the ...


3

lets talk about thermal time constants. A cubic meter of copper has 9,600 seconds thermal time constant, with 4 of the 6 faces insulated, and heat applied and removed from 2 opposite faces. We can chop the cubic meter into 0.1 meter columns, and then into 0.1 meter cubes, and we learn the time constant has sped up by 100X, to 96 seconds. Chop more, into ...


2

I got it working, the crystal was not connected (I missed the traces between OSCIN OSCOUT and it), as soon as i connected them it started working normally. Thanks for your help!


2

If you can bit-bang the I2C master, and if none of the devices use SCK-based handshaking, you could swap SDA and SCK on some of the I2C devices. You may need to check your I2C code to make sure it never generates any sequences of events on SCK/SDA which a device with those pins reversed could mistakenly interpret as a start+addressing sequence. Normally ...


2

First you should verify whether you mean SDRAM or SRAM. I don't think this microcontroller supports SDRAM and I suspect you should plan to use an external SRAM. Refer to the microcontroller documentation for examples on how to connect the microcontroller to the external SRAM and flash. You could also find an evaluation board that contains external ...


2

I was also looking into the subject, and I found that a pull-up in TDO and TCK is desired, but also a pulldown of SWDCLK. See the following link for more info http://support.code-red-tech.com/CodeRedWiki/HardwareDebugConnections Some micros have internal pull-down on SDWCLK. I have not worked with NXP, but for Freescale that is the case.


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