New answers tagged

1

Answering your question directly is not that easy. So I decided to tell you how I imagine the invention of this famous circuit happened. I was inspired by the @jonk's great story... and I decided to enrich it with more observations and thoughts accumulated over the years. To really understand the circuit(s), several things are needed - full current paths, ...


0

Many microcontroller ADCs will sample an input by momentarily connecting a capacitor. Depending upon the controller, this capacitor may be precharged to a voltage near the previous voltage that was converted (not necessarily on the same channel), the analog zero reference, or an arbitrary and unpredictable voltage. This can lead to three scenarios: If the ...


1

Years have passed since this problem was reported. If someone else stumbles over this thread, just like me. After hours of trying, I've just made a working simulation with the MCP601. Try: .options cshunt=1e-15 to avoid the convergence problem.


2

You might find the following illustration helpful (but might not!). simulate this circuit – Schematic created using CircuitLab Figure 1. Reference circuit for Figure 2. Figure 2. Picturing the inverting op-amp as a see-saw with it's pivot point being fixed at "virtual ground". How it works: The gain of the see-saw is -2. That means that if ...


3

Two answers: We have a negative fedback loop when there is one (or three) signal inversions around the whole feedback loop. In both shown circuits, there is one such inversion because the output is fed back to the inverting terminal. As another example: We also have negative feedback when the feedback loop contains a second inverting active stage and is ...


3

If your LDR is at the end of 40m of wires, then these wires may pick up some noise or AC hum that will screw the accuracy of your ADC measurement. First thing is to use a shielded cable ; if you use Cat5 and it's shielded Cat5 then just connect the shield to chassis ground on the arduino side. Then use two wires in a twisted pair for your LDR, not two random ...


2

Here is a list of my personal recommendations: If the output impedance of the source is high then you should consider using an opamp. But you should also check the input impedance of the ADC channel The last time I checked, an Arduino's ADC input impedance was specified as 20 MΩ. This determines the need for buffer use. Let's say you want to measure the ...


1

simulate this circuit – Schematic created using CircuitLab Figure 1. Modified circuit. Vref sets the input bias to -3 V. R4 and R5 form a simple averaging circuit. When VIN is 0 V the average is - 3 V. When VIN is +12 V the average is +3 V. I've set the gain of OA1 to 3 deliberately so that VOUT doesn't clip. It gives a squarewave of -9 V to +9 V. ...


1

this process shall repeat over and over again. Would the circuit then just cycle between being +6V and −6V until the power supply is disconnected? No. As you noted, each time around the loop the input difference is less. Eventually the output is essentially equal to the input and the circuit is stable. What you are describing actually happens. If you ...


1

There are two ways to achieve this: Operate OA1 an a linear amplifier with a gain of 2. With a "rail-to-rail" opamp and a gain of slightly less than 2, the output will not clip and the circuit could be used to shift other waveform types, like a sine or triangle wave. Operate OA1 as a comparator. In this case the output swings between positive ...


6

If you give the op-amp even a tiny bit of offset voltage when you connect the uncharged capacitor the output will slam to one rail or the other and oscillation begins. Similarly, even if perfectly balanced on knife-edge, a microvolt of change in offset voltage will be amplified by perhaps 1,000,000 and the output again saturates, since that 1V becomes 500mV ...


5

The uncharged cap should not create any change in the difference of voltage between inverting and non inverting inputs that the op-amp could amplify, so I would expect that in a perfect simulation this circuit would not start oscillating in the first place unless the capacitor does hold a tiny bit of charge. You are correct and there are many questions on ...


4

This is covered in most basic op-amp tutorials but here goes: Assume Vout is zero on power-up. If VIN+ goes to 0.01 V then the difference between VIN+ and VIN- will be 0.01 V. The output will start swing to 0.01 × A where A is the op-amp's open-loop gain - typically 100,000 to 1,000,000. As the output start to increase the difference between the two inputs ...


0

First, I will present a method that uses Mathematica to solve this problem. When I was studying this stuff I used the method all the time (without using Mathematica of course). Well, we are trying to analyze the following opamp-circuit: When we use and apply KCL, we can write the following set of equations: $$ \begin{cases} \text{I}_2=\text{I}_2\\ \\ 0=\...


0

According to my calculations: $$ \texttt{if: } R1=R5=\color{red}{R_{g}}\texttt{; } C1=\color{red}{C}\texttt{; } R2=\color{red}{R_L}\texttt{then: } \\ Z_{in} = \frac{ \color{red}{R_L}} {2}+ \frac{ j\omega \color{red}{R_{g}C} } {2} $$ Therefore, in practice, this circuit cannot be a good floating inductor, since the value of \$ \color{red}{R_L} \$ will be ...


0

Appart from the discussion about 12V from 11.5 V, you can limit to 12 V with minimum drop with a simple modification of your first diagram. Also a P-channel mosfet for Q2 will improve a little.


0

There is no value of caps across Op Amp that will improve the result. This is a common yet useless design. The non-inverting Op Amp gain is Av+=1+|Av-| so the 1+ passes thru all the noise using the non-inverting input (unlike an LDO) As a couple of reviewers did not appreciate my 1st answer that concludes nothing much can improve the noise (unless it was ...


0

Q1) The diode is there because it drops the Vdd on IC6 by about a volt (whatever the Vt of the diode is). That means IC6.2 is only feeding a maximum of +8V into IC5.1 Q2) Will it matter? I suspect so, but define "matter". Guitar pedals like to throw diodes into random places because it causes or ameliorates "clipping" which creates non-...


2

I get exactly 9.90V for an ideal op-amp. There is net negative feedback because R4 < R2 so it is stable. Just equate the voltages at the two inputs and solve for V3. What you call V+ is not just dependent on V1, it also depends on V3. V- also depends on V3, so V3 appears on both sides of the above-mentioned equation. Give it a try.


2

General approach for analysis: If Z3 and Z2 are primarily capacitive and Z1 primarily resistive at frequencies of interest, it all comes out as a 2nd order response, and Z2 can give some control of Q for instance. Op amp Zo could go alongside Z3 also, to refine the picture. Update - with the rest of the OP circuit shown, some kind of ratiometric switched ...


3

Common mode means that both inputs "move" equally up or down. To keep this simple, start out by imagining both inputs to be the exact same voltage (same source, even) and midway between the rails. In this case, both BJTs will share equally the current generated in \$R_\text{EM}\$. The split currents will generate their respective voltage drops ...


3

There is a small bias current that flows into the input, less than 1% of half of Iem at balance, for transistors with hFE > 100. Common mode input impedance will be very high because that bias current does not change much with small changes in input CM voltage. In many cases you can ignore both input bias current and input CM impedance when modern op-amps ...


1

As the RC HPF phase shift of 3x 60 degree= 180 degree phase shifters is RC= 100ns =T for the 3rd stage, in order to satisfy the Barkhausen Criteria threshold of instability (oscillation) the positive feedback for a sine wave must be Av=1 @ 360 deg. Tricky Tacky Details However you will notice that each stage is not independent but “apparently” (pun intended) ...


1

It would be good to have the actual output voltages of each op-amp relative to ground. But if I interpret correctly you are getting +11V for 22% of the time and -11V for 78% of the time, so there is always a 0.5W dissipation (@0.5A), plus Iq * 12, for a total of 0.62W or 0.74W depending on whether Iq is per amplifier or for both. So that would be a junction ...


2

I'll not comment further on the issue regarding the two sinusoidal voltage sources and the fact that the circuit below uses a single inverting amplifier (the one in your circuit is a non-inverting amplifier and the first is a buffer). You may need to "jump-start" the simulation with some energy, otherwise it may just react to some "numerical ...


1

Aren’t you shortcutting negative and positive 12V this way? Switching on plus 12V happens faster (driven by 1 MOSFET) thans switching off minus 12V (driven by 3 MOSFETs). I mean: in the second, non inverting example. Not sure why not also very briefly in first example though.


2

if I remove V4 and V5 completely, there is constant 0V in point B. You may have run into a limitation of the simulator. At t=0 or start, many simulators simply find the "DC operating point" to preset all nodes to their DC voltages. This is fine for most circuits, but it can present a problem for simulated oscillators. In the real world, nodes ...


2

It looks like your intent is to measure the voltage at V4 and V5. But instead of putting a probe there you put voltage sources. I am not specifically familiar with Micro-Cap but you probably need to put a voltage source on VC and VE so that the op-amps have power. As for the correct potentiometer value... The op-amps (without the pot) are configured for a ...


4

What you have is called a phase-shift oscillator. There are many web sites with the design information, in both linear and matrix algebra. What are V4 and V5? If they are measurement points, fine. But if they are voltage sources, the standard circuit and design methods will not work. Search for phase shift oscillator schematic. Each of the images has a ...


6

The voltage of point B is fed by voltage source V4. Nothing else in the circuit affects it, V4 outputs what you have written it to output. The circuit is not an oscillator. I do not know all versions of Micro-Cap. You may have a possibility to insert an internal series resistance to V4, but I guess it's now = zero ohms. Those versions of Micro-Cap that I ...


0

RF has no gain for feedback but some input attenuation to prevent nonlinear effects. AM demodulation... But there is a integration factor for gain, so it is gradual HF rejection. So here the intent was Zener white noise attenuation but it also differentiates PSRR of the Vcc with Cf to a flat or no attenuation (C9/C6) of zener voltage error, rather than 1e5 ...


6

You'll have to assume a finite gain for the op-amp (meaning the voltage between the inputs is small, but not zero), and preferably also a non-zero impedance for the reference diode to get a sensible answer. The main reason for using this configuration is to prevent small DC shifts due to EMI, especially with a bipolar input op-amp, which should be a hint ...


1

"May I know how they arrived at the equation for CF?" That equation comes out when studying the stability of that circuit. Study the Bode plot. "Is this equation is valid for non-inverting configuration also?" Yes. As pointed out by LvW (See his/her comment below), stability depends solely on tha loop gain which is equal in both cases: ...


3

Stability problems are caused when the loop gain (gain of the complete open loop) has at least two poles. In this case, the slope of the loop gain function at the unity.gain crossing can be rather close to -40dB/dec. That means: The phase of the loop gain function is pretty close to the -180deg line. (Remember that for -180deg - together with the sign ...


0

Advantage: Very high current gain allowing a pretty large input resistance. Disadvantage: The resulting transconductance which determines the voltage gain of a DARLINGTON stage is only 50% if compared with the capabilities of the second transistor and its own transonductance (this is the price to be paid for the large input resistance). Summary: The ...


1

The main advantage is you get a ton of current gain (round about the square of an individual transistor of the same type). Yes, you could use two dissimilar transistors. Main disadvantage is Vbe is effectively doubled to about 1.4V, and, just two transistors (though typically you get them in one package). No, they cannot generate power "by themselves&...


0

Op amps are used all the time to amplify DC, or really slow DC coupled signals, or AC signals with DC bias. As long as the op-amp input voltages and output voltages and currents are within the operating limits, they will just work. If you look at the open-loop gain plot, or gain-bandwidth product, it simply shows that it is possible to amplify slow signals (...


2

Let's first get this out of the way: the inputs have to be very close to each other in voltage for the op-amp to do anything besides be a comparator. This is because op-amp open loop DC gain is large, in the thousands to tens of thousands, and can vary by an order of magnitude in some cases. More about that here: https://www.analog.com/media/ru/training-...


0

For common mode impedance balance reasons R1 and R3 should be the same value (call it R): - And, given that both inputs are resistively terminated at the same voltage (Vx), due to op-amp action and negative feedback, the differential impedance is 2R. But, if you ignored the CM impedance balance requirement the input impedance is R1 + R3.


2

The differential input impedance is R1 + R3. That is because the op-amp actively makes sure via the feedback R2 that both V+ and V- nodes at the op-amp have identical voltages. Therefore, as V1 terminates via R1 into voltage V-, and as V2 terminates via R3 into voltage V+, and as V+ and V- are identical voltages, there will be V1-V2 over the sum of resistors ...


3

Basic idea The circuit is based on a simple arithmetic trick: During the positive input half wave, only the input voltage Vs is used - Vo = Vs. During the negative input half wave, two times higher and inverted input voltage (2Vs) is added to the negative input voltage (-Vs). As a result, the negative input half wave becomes positive output half wave - Vo =...


4

Which is the input resistance of the second amplifier? It's a tad more complex than it first seems. The circuit operates as a precision full wave rectifier and the 2nd stage op-amp is summing two signals: - The input signal via \$2R_2\$ and An inverted half wave version of the input via \$R_2\$ A version of your circuit is here courtesy of Elliot Sound ...


4

Okay, the basic function of this circuit is as an oscillator. The frequency and the duty cycle both vary with the input voltage. Maximum frequency is at Vin = 2.5V where the duty cycle is 50%. I'm just stating that. The capacitor charges or discharges through R3 toward Vout of the comparator (which we can reasonably approximate with either 0V or 5V in this ...


0

The book is clearly imprecise! An ideal opamp puts out: 0V when both inputs are perfectly equal, at any voltage level; Plus `infinity' volts when the positive input is greater than the negative one; Minus `infinity' volts when the positive input is lower than the negative one; The last two ensures that feedback actually works, both positive and negative. ...


1

C3 will object to rapid changes in base voltage applied to Q1. The capacitor is a filter of sorts I think, but from the perspective of the op-amp it appears to be to make an op-amp integrator circuit. R4 and R6 are sampling resistors for the current sense resistor R5. Their values will control how quickly the op-amp integrator circuit around U1A responds ...


6

I was taught that this is only true when the op-amp is set up in a negative feedback configuration. You were taught properly, the book author is being sloppy. Many useful opamp circuits use negative feedback, but not all. Without negative feedback, there is no reason for the input voltages to match.


0

If you look at the gain equation for a (ideal) non-inverting opamp circuit, you will see that there is no term for the input impedance. This is different from the inverting-amplifier case, where one of the gain-setting resistors also sets the input impedance.


0

OK, as I pointed out in comments, the question is ambiguous as stated. Nevertheless, I'll try to answer the way I understand it. First, you do not really want to "disable" motors. Disable in a context of motor control means freewheeling. What you seem to want is stop it, by sending 0V to the driver. The reason it does not work for you is that ...


2

It's good practice to tie them somewhere. If you can spare a couple of resistors, it's good to connect the non-inverting input to a defined voltage (like ground, or a rail) with a series resistor, and connect the output to the inverting input with a resistor, to make a voltage follower. If you just connect the output to the -ve input, and the +ve to ground, ...


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