48 votes
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Why do some diodes have a glass package?

Early semiconductor diodes were mostly glass packaged which provided the advantage that they were hermetic and did not depend on passivation of the chip to survive heat and humidity. The glass package ...
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42 votes
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What is the difference between SOT 23 and SOT 23-3 package types?

In the beginning of the surface mount era was SOT 23, which had three pins. It was used mainly to replace the very popular TO-18 and TO-92 3 pin leaded transistor packages, the name means Small ...
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  • 142k
27 votes

Why do radiation hardened IC packages often have long leads?

It isn't directly related to radiation hardening, it is related to the packaging. Rad-hard and other high-reliability parts often come in flat packs. The user is expected to form (bend) and trim the ...
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  • 9,126
25 votes
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Why do radiation hardened IC packages often have long leads?

Taking the example of the chip in your picture (RHFAC14A - datasheet,) they aren't always in the flat package with long leads (FPC-14.) They are also available in DILC-14, which looks more like a ...
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  • 58.5k
24 votes
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Why is there copper on the side of this package?

For plastic overmoulded parts, the lead-frame (correct terminology) is held in place while the plastic is injected. For packages like PTH (Pin through hole) or j-leads etc. the surrounding support is ...
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  • 29.6k
24 votes
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ICs ("chips") are typically packaged in what material?

Transfer-molded epoxy (which is a thermoset material). Thermoset plastics, once cross-linked will not melt, they only char at high temperatures. See, for example, this TI/NS document: As ...
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21 votes
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What well-known ICs have essentially no packaging?

You can actually buy unpackaged ICs. They are sold as "bare die". Basically this means that the silicon has not been wire bonded into a package nor covered up. I've come across a few things including ...
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20 votes

Why is there copper on the side of this package?

preamble: this answer is getting quite a number of upvotes but please note that this other answer is great too and adresses smd parts. Have a look at this image: As you can see in the center there ...
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20 votes
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Using decapped ICs in production

I can't speak for all manufacturers or all product lines, but I've worked as an applications engineer at Maxim Integrated Products for 25+ years. You mention that the product in question is some kind ...
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  • 13.4k
18 votes
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Why do many old ceramic packages have a gold line?

That's often (but not in this case) connected to ground. You can see that the connection has been cut at the end of the package. In some cases the chip is designed to have the cavity, to which the ...
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  • 7,613
17 votes
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The metallic plate behind >2010's CPU's heatspreading plate is the actual chip die substrate?

In most if not all modern processors, the silicon is flip-chip bonded onto an interposer which then has all the connection pads on it. As a result the back of the silicon die is then at the top - ...
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16 votes
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Design Considerations for Electronics in Space

This is what I do! Many, many excellent books have been written on the subject, but as a brief bullet-point list, focused particular on embedded systems for space usage: In general, we use many of ...
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  • 6,106
16 votes
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Is there a difference between SOIC and SOP?

Yes, there are subtle differences that may or may not affect a particular design. For example, look at the specified package height from the bottom of the pins to the top of the body. Whether ...
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  • 5,441
16 votes
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What can I do about using incorrect P-FET package?

It's unfortunate, but you probably just need to get new PCBs made. You've learned an important lesson today, to always double check your package pinouts! For the purposes of running tests, you may be ...
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  • 20.2k
14 votes

What well-known ICs have essentially no packaging?

UVPROMs (Ultra-violet erasable read-only memorys) had a quartz window through which you could see the actual silicon chip.
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14 votes

Using decapped ICs in production

I have used de-capped IC in pico-probing for silicon debugging. (Where you remove the top and passivation layer and then put probe needles on the die) The decapping is done with special hot-acid pump ...
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  • 14.1k
13 votes
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What's with TO-252 package middle lead?

Several different packages (both SMT and through-hole) are all based on the same lead frame. The only difference is in how the lead frame is trimmed and bent after the epoxy encapsulation has been ...
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  • 165k
13 votes
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If the integrated circuit die is very small what is the role of the extra circuit packaging?

What is the purpose of the packaging? Protecting the IC against light (light will induce current flow in a PN junction) Protecting the IC against moisture Together with the leadframe take the ...
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13 votes

‘One for all’ standardized land pattern v.s. specified land pattern in datasheet

The correct footprint to use for a component land is 'one that works'. This isn't so flip as it sounds. What does a land pattern have to do in order to 'work'? a) it must connect each component ...
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  • 142k
13 votes
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Why are MEMS in QFN packages?

Simply because: what else would you want to use? Chip-scale packages are typically out: MEMS devices typically need reliable enclosure; a layer of lacquer typically doesn't work. flip-chip BGA ...
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12 votes
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What's the main differences between a TSSOP and a SOIC and when would you use one over the other?

The SOIC is more than 50% longer than the TSSOP. (4.9mm vs. 3.0mm) and only a bit wider. That may not seem like a lot to you, but on a crowded board it might make a difference. The SOIC is taller (1....
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12 votes
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Tradeoffs when choosing the op-amp package: quad vs dual vs single

With no exceptions that I can think of, using four op-amps requires that all the op-amps be of the same type. In many cases this means that some of the op-amps will not be optimal in some way. The ...
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12 votes

What well-known ICs have essentially no packaging?

A lot of the old (70's and 80's) uP, RAM and such were produced in ceramic packages for hi-rel or hi-temp use. These ceramic packages are easy to distinguish, since the ceramic is usually white or ...
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12 votes
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Why do single op-amp DIP packages have 8 pins, rather than 6?

Historically, it was more efficient to put multiple instances of the same function into the same chip, so DIP packages usually had at least 14 pins. The JEDEC MS-015 standard never had defined ...
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11 votes
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Is there any way to use industrial sized IC's package in home project?

BGA is mighty hard, even for non-home operations. I can't think of any way you'd solder them without a reflow process, and without good equipment and a way to inspect them, you'd probably just destroy ...
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  • 55.5k
11 votes

ICs ("chips") are typically packaged in what material?

Just to add to Spehro's answer, you can usually request the materials composition of a specific IC directly from the manufacturer, if you know where to look. They won't give away the complete recipie ...
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  • 13.4k
11 votes

If the integrated circuit die is very small what is the role of the extra circuit packaging?

In most cases, the extra packaging is needed only to attach pins and bond the pins to the die. A lot of more modern packages are much smaller because they don't use older DIP pin size/pitch standards....
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  • 2,127
11 votes
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Are there any SOT-23 BJT's with swapped Base and Emitter pins?

the order code typically has a suffix R for Reverse bc847 and bc847R emitter base swapped.
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11 votes

What is the significance of numbers (2,3) mentioned in SOT23?

While some packages do have numbers that mean something, the TO, DO, SC, SOT, and SOD series are simply serial. SOT-23 is just package number 23 in the JEDEC SOT specifications. There's no ...
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