New answers tagged pcb-design
9
votes
Will capacitors that are connected between GND and Vcc to a CPU impact the capacitance between the same pins on other components?
Yes, but.
Decoupling capacitors work best when they're as close as possible to the pins of the IC (some ICs even have internal decoupling capacitors placed directly on top of the silicon die itself). ...
- 30.1k
1
vote
Accepted
Earth for custom POE+ board design
That's not "Earth" literally, but it could be. It depends on your exact scenario, but if your RJ45 socket has a metal shell, it connects to that, as it might be Earth if you are using an STP ...
- 137k
1
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Ultrasound System Design: Navigating Transmission Line Challenges and Impedance Matching
15 MHz corresponds to 20 m (in vacuum). Maybe 13-17 m in coax (with 65-85% velocity factor). With 2 m cables you're on the edge of the 1/10 wavelength rule here.
With that in mind, it's probably a ...
- 128k
0
votes
Ethernet switch ic to SoM connection
You can use capacitive coupling. Take a look at Micrel Application Note 120, the exact circuit depends on which switch you are using, but typically look something like this:
- 3,561
1
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Vias directly on SMD pads?
The answer is VERY simple.
Use non-conductive fill, plated over-in-pad, with soldermask covering the via.
I routinely use a 0.2mm mechanical drill, with a nominal 0.7mm pad.
I use it for all the vias.
...
4
votes
Acceptable PCB practice for pad routing and vias
Yes, though I would avoid going directly between two adjacent pads if they are very close. This looks like a short-circuit when soldered, making it harder to spot any real short-circuits.
If the pad ...
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9
votes
Accepted
Acceptable PCB practice for pad routing and vias
You can route your signals to whatever point of the pad that is convenient for you, it does not matter (at least not until you go into very high frequencies). So both options on your image are equally ...
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9
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Acceptable PCB practice for pad routing and vias
For (1), yes, you can certainly do that. The only case where it might be a problem is when it's a very high-bandwidth controlled-impedance signal, but if it's a high-bandwidth controlled-impedance ...
- 30.1k
2
votes
Accepted
Why does MD13S JST have an NC pin?
They claim it is "Grove compatible", which refers to a hobbyist ecosystem using connectors with pins 3 and 4 devoted to Vcc and GND respectively. The English is a bit painful but:
...
- 384k
3
votes
Pros and cons to round PCB design
I would like to add to this question from our perspective as a PCB assembly company. So this is regarding the actual manufacturing of your product.
To assemble the bare PCB, all PCBA companies will ...
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1
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IPC-B-25A test board schematic
The IPC-B-25A Test Board is often times used to evaluate interactions between solder masks, solder paste, and fluxes. It is also used to test conformal coating of PCBs to measure their protective ...
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4
votes
Shielding bottom of PCB in THT design
Ground plane will have the most benefit at high frequencies, which is still of concern for audio circuitry as RFI can become detected (rectified) by semiconductor junctions, whether discrete (...
- 27.3k
0
votes
Do you put a ferrite bead on both the positive voltage and GND trace?
You generally want each connection to the ground node to be as low impedance as possible to every other ground node. Ferrite beads are inductors, so you're introducing an inductance between two points ...
0
votes
PCB Design - Routing Around GND under Chip
Two questions must be answered:
Does the path degrade the performance (including reliability) of the circuit? If it does then no. We cannot answer that question for you because it depends on the ...
- 13.6k
1
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Return current via
Don't sweat it, UART signals aren't nearly fast enough to worry about per-via signal quality measures like this. Just stitch evenly.
I wouldn't even bother with top/bottom GND, just use GND and VDD ...
- 27.3k
1
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How to decide number of layers?
Most designs need only four layers if you need more for current carrying capacity then increase the thickness and get more than one ounce copper weight when you order the PCB.
Typically only high ...
- 78k
3
votes
How to decide number of layers?
More layers = more cost, in general.
1 layer: only for the limited cases of mass production where saving
cents per unit counts, or for home-etched PCBs. Often have to use
link wires to join up parts ...
- 406
3
votes
Accepted
ISA Card Mechanical Drawing Source
There are mechanical drawings in section 2.12 of the Extended Industry Standard Architecture (EISA) Specification 3.1. Figures 95 and 96 show the dimensions for a 16-bit ISA card. There are dimensions ...
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4
votes
Are uVia, blind via, buried via and backdrilled via only relevant to high speed design?
Back-drilled vias are typically relevant for high-speed designs only. That's because they are relatively expensive and don't offer any other significant advantages apart from reducing signal integrity ...
- 3,025
3
votes
Are uVia, blind via, buried via and backdrilled via only relevant to high speed design?
Not just for high speed.
If you have a very fine pitched BGA case IC with large amount of pins, it will be difficult to "fan out" the signals away from the IC.
However, such large ICs tend ...
- 137k
4
votes
Is it a good idea to place SMPS output capacitor close to inductor?
It looks like you have a high voltage buck converter here. This layout looks good by eye to me, as long as you have a solid ground connection.
If you're soldering these by hand and the capacitor isn'...
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0
votes
Can you power 2 voltage rails simultaneously using a buck-boost converter?
While you may need two regulators for two different voltages, the modern element base offers a few interesting tricks.
E.g. you may get a single-chip switching mode buck+boost regulator that uses a ...
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1
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Checking PCB Layout, Routing Tips and Improvements?
Your board is essentially working at DC.
Therefore:
You can run signals on bottom layer. As long as the plane is not too broken by routing other signals, it should work fine.
Vias do have inductance....
- 137k
0
votes
Can you power 2 voltage rails simultaneously using a buck-boost converter?
-You may find a single DC-DC with a dual channel output that can provide you with 5V and 3.3V.
where to begin with searching for the right buck-boost for this
application
You can loot it up in ...
- 2,951
1
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Can you power 2 voltage rails simultaneously using a buck-boost converter?
You can use a linear regulator along with a boost converter to get 3.3V and 5V respectively.
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0
votes
Can you power 2 voltage rails simultaneously using a buck-boost converter?
You need two different regulated voltages. So you need two DC/DC regulators, not one.
Therefore, no, a single one can't do that. You might be able to do it with two instances of the same type of ...
- 90.4k
11
votes
Accepted
Why should I route the feedback trace under the output capacitor?
I doubt it matters.
Appnotes love to go overboard with layout instructions, but without explaining what and why; let alone giving quantitative values, or comparing alternative layouts with ...
- 27.3k
21
votes
Why should I route the feedback trace under the output capacitor?
The reason for this is that there's a very large ripple current flowing from the output inductor down into the output filter capacitor. The trace between these two isn't perfect (it has resistance and ...
- 15.6k
0
votes
NFC antenna design - moving from rectangular to circular
Is it simply a case of creating a spiral with the same overall length
as the rectangle, with the same track size, spacing etc
No, it will be kind of luck if that manages to work out. You might get ...
- 2,951
1
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PCB layout, any improvements to make on the routing?
I can tell what I know:
calculate trace width, use more with some margin and excess for power ones
** switching nodes need thicker traces to avoid parasitic inductance and elements must be close to ...
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3
votes
Accepted
PCB layout, any improvements to make on the routing?
A common ground plane is always recommended.
Use copper pour to make the ground plane available everywhere
possible
use a trace width calculator to ensure that the traces can carry the
required ...
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0
votes
Altium PCB Dashed Lines
There is not a line style for line objects (in top overlay nor in copper) within Altium Designer for PCB editing.
When editing a schematic, there are drawing tools which include lines, which have a ...
- 33.4k
0
votes
Accepted
The complete circuit of this project
There is a 8 pin IC and a 10 pin IC. You need to know what they do. I guess the 8 pin IC is a linear voltage regulator and the 10 pins IC is a battery charging monitor IC.
If it's exact, search for ...
- 2,025
0
votes
Off-center via-in-pad
Vertical conductive structures might be a possibility. They allow for denser routing than even via-in-pad, and are made by drilling out a plated slot periodically to transform it into many separate ...
- 1,601
2
votes
Accepted
How do I handle a component with pin spacings smaller than the necessary trace width?
Trace current handling (ampacity) only matters over long distances, where heat isn't being sunk along the length of the trace.
As long as you make the connection (fanout) short, and attach it to a ...
- 27.3k
0
votes
Standalone ATmega328p not working
Okay guys, finally found the solution for my problem:
At first I thought the capacitor C1 which is connected between RST and GND, was the problem, so I removed it. But this did not fix the problem.
It ...
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2
votes
Off-center via-in-pad
The exact via drill position on the finished PCB is depending more on manufacturing tolerances than on your deliberate offset. A drill hole in the exact center of a pad is probably rare even when you ...
- 2,533
0
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Off-center via-in-pad
How do PCB designers usually solve the problem of diff pairs out of 0.8mm pitch BGAs?
Blind vias will help a lot, and they are usually a relatively cheap addition to multilayer PCBs. Use blind vias ...
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4
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4
votes
Accepted
Off-center via-in-pad
A solution to this would be to put alternating rows of vias off-center
so that there are some rows where the traces will fit. The via and its
pad will still be entirely encompassed by the smt pad and ...
- 78k
3
votes
Accepted
ADALM 1000 hardware schematic
Schematics are at the bottom of this page
https://wiki.analog.com/university/tools/m1k/hw
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1
vote
Altium Designer Net Antennae Error
Altium will flag a via going to nowhere as a net antennae. You have two options:
Right click the error and tell Altium to "waive violations", and ignore it. Altium is warning you that there ...
- 1,136
1
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Altium Designer Net Antennae Error
I don't think your via will actually create an antenna.
The net Antenna rule in Altium is to make sure there are no stubs on critical nets. I usually use this rule constraints on high speed interface ...
- 78
2
votes
What switch should I be using to accurately measure the input bias current of this op amp?
You do not specify the mysterious 'they' who show that the circuit is push rod operated, but, anyway, in mass production of the devices, the industry (Analog ...
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2
votes
Female jack for AC/DC power supply
I contacted Kycon about this a while back, that 7.5A on their data sheet is per pin. ( That makes it 15 Amp capable with 2 positive and 2 negative )
It is a little miss leading so I contacted them ...
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1
vote
Problems with high frequency SPI
If you are in fact sampling your 30MHz clock at 48MHz, the signal will alias around the 24MHz Nyquist rate and show up at 18MHz. It will probably be attenuated by the antialiasing filter. I suspect ...
4
votes
What connector pin header can I use for high voltage?
A quick digikey parametric search
(1) "Connector" -> "Circular Connectors" -> "Circular Connector Assemblys" ->
(2) Max. Current >= 30A -> Max. Voltage >...
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