New answers tagged

0

Your traces are running much too close to pads or other traces in many instances. Almost touching. It's not going to work. You must leave at least 8 mil for clearance between traces and other copper elements. Generally use the same width for the traces and for the clearance between them. I'm afraid you vias are not 24 mils on the picture. They look much ...


1

#1-#8 beware of the autorouter routing traces really close to pads or at awkward angles, if the pcb fab is cheap and the soldermask is a little off, the track that is close to the pad could be uncovered and you get solder bridges. It costs nothing to space your SMDs (#5) a bit more, or push some traces around. #8 without heat sinking, this 7805 won't be able ...


1

PCB antennas can work. However their structure/shape determines the impedance. If the PA output impedance isn't the same as the low power version, then you can not just drop in a squiggly PCB antenna and have good matching. The inverted F antenna is pretty common on PCBs. It gives decent range and is easy to match. FR4 PCB material will work, but its ...


4

If you're seeking longer range, and are going to the trouble of using the extra RF amplifier circuitry, why do you want to impair the range by converting back to a lower-efficiency PCB trace antenna? If you don't like the "rubber ducky" antenna that comes with the higher-power nRF module, even substituting a bent wire -- of the proper length -- ...


2

Most likely heat damage and/or hot connect surge currents in power supply, get adequate voltage from datasheets for case size and cap value for 19.5V chargers. Then Learn that Laptop chargers hot inserted burn out connector contacts and caps, same with USB 12W on lightning connectors, even tho no OEM ever tells anyone in public about this.!!!!! Gold plating (...


1

I have found a solution: The circuit was behaving as if there was a 25nF output capacitance. I don't know where this was coming from. The losses were all occurring in the MOSFETs since no other components were getting warm. Despite what I said the current draw was proportional to DC Bus voltage and the switching frequency (sorry for misinformation). I ...


0

On Linux, the kicad-packages3d may also be installed to /usr/share/kicad/3dmodels/. To set the correct path, open KiCad, select Preferences->Configure Paths, and set the path /usr/share/kicad/3dmodels/ for KISYS3DMOD. Restart KiCad and try again if the 3D components now work. For me this was the case on Ubuntu 18 and KiCad 5.1.7 (installed with the sudo ...


0

The first thing you need to do is determine your maximum frequency, because if it's over 50MHz then it's considered high speed design and transmission line effects start to become a concern. Transmission lines need to be impedance matched to the source and the load, there are many techniques to do this on a PCB. The HMC833LP6GE has a 100Ω-200Ω so that is the ...


1

Does losing shield affect ESD performance, durability, certification Yes on all three counts: ESD: the shroud also gives some protection, this is better if the shroud covers the whole circuit, not just the connector, or if some other structure coves the remainder of the circuit. Durability: exposed board fibres will cause greater wear on the socket than ...


0

Note: currents explore and exploit ALL POSSIBLE RETURN PATHS, proportional to conductance (actually the SUSCEPTANCE).


0

is there a downside of using PCB printed USB connector? If a USB cable is used, yes. Otherwise, no. Does losing shield affect ESD performance, durability, certification? It shouldn't. The shield of the connector is more helpful when there is a USB cable. Does it make difference if I am using this connector in laptop USB port vs DC wall adapter? Again, ...


4

DIN 7985 Phillips pan-head screws have a head diameter of 6.0mm maximum. It will be different if you use a socket-head cap screw or other shape of head, of course. Standard fit hole size is 3.3mm, so you need to allow for 3.15mm (3mm radius + (3.3-3)/2) off the nominal center of the hole. If you use a larger hole (eg. 3.6mm) you'll need to allow more like 3....


3

Looks like there's a cutout made in a specified layer before lamination. Assuming it is something like this: I think you would create an outline for the stackup layer that needs the cutout milled/routed out of it, as well as an overall board outline. So add mechanical layer and draw the cutouts and add text to explain what it means. But definitely talk to ...


6

lots of high frequency lines going from the source to consumer Before considering EMI, think about signal integrity. For example the 0.1" headers pictured only have one GND pin which serves both as current return and reference for all signals. This means return current from each signal will create a noise voltage across the GND pin's impedance. Since ...


1

I cannot figure it out how the current calculated They're probably not calculated because they include strong safety margins for maintaining intrinsic safety thus, the current won't produce an excessive over-temperature (for a given track width) that might ignite a contacting gas. It's highly likely (that along with spark ignition testing on various gases), ...


2

Periphery or I/O connector ESD protection is indeed ineffective against ESD events in the middle of a board. That is why ESD sensitive circuitry is typically enclosed in a housing. And why it is recommended that repair, maintenance, or development work on such a device occur only in an ESD-protected work environment. Many modern ESD-sensitive semiconductors ...


2

There's no problem with manufacturing it as shown if the design rules are not violated. It's aesthetically ugly, but it will work. Here is the more usual way of changing trace width in mid-trace in Altium: By not changing the direction simultaneously with the trace width it is more pleasing to the eye, at least I think so. Of course if you're running traces ...


2

As long as you obey the 'design rules' of your pcb supplier, you can do whatever you like with pcb trace width and not worry about 'etching problems'. It's entirely normal to reduce the width of traces where space is limited. It's sometimes called 'necking'. Remember that power traces usually need to be wider than others. That aside, your board will likely ...


1

Stop the fatter trace short of the corner (by the difference in radius between the traces), and make an L on the thinner one. Is it worth the effort? That's up to you. It might be if the trace above continued past, and the blob violated spacing rules.


3

no etching problems? If the smaller width works, this will also not be an etching issue. Also, this is a DC line, so you don't have to worry about anything geometrically here. elegantly You're asking about æsthetics here. Well, can't help you with that, honestly, different people find different things pretty. It might be prettier to simply not have the ...


2

What happens if I use this Inductor in both input and output path? The inductor you linked is 0.47 uH so, it will be ineffective as a filter but have no problems with the operating current. I am unable to find the part number for matching the recommended value(10uH to 47uH) in 0805 package at the input and output current rates of 2A. Yes, that doesn't ...


0

You would not be bringing Vcc off the board, but Vcc through a resistor (perhaps 10K). Not the same thing at all. You can add a ferrite bead to the ground connection to keep the 'antenna' from bouncing your ground around, and use shielded wires. Then filter and maybe buffer (if necessary) the signal before it goes to the ADC. Edit: assuming your ground is ...


1

The primary reasons that mounting hole has the vias through the pad is to connect the pad to: The pad on the opposite side of the PCB Internal copper planes of the PCB Connect to signal traces inside the PCB These are used when the large diameter mounting hole itself is not a plated hole. The reason for that is that screw threads in the hole can shave off ...


1

I've done this before because I've seen it on other people's boards and thought it looked cool. 8 vias won't alter the cost at all. You often stitch around the edges of ground planes with vias because it improves their RF properties. It stops overhanging ground plane from being a resonator. So you could have probably just had them in a square around the ...


4

As already mentioned, parallel resistors (of a given power rating) offer greater dissipation than a single one. Saves having to inventory 'special parts' too. Another advantage is that any heat generated is spread over a wider area. Helps avoid 'hot spots' on a circuit board. You can also use parallel or series resistors to produce unusual resistance values ...


8

An additional point that noone has yet mentioned: Redundancy If one high power resistor fails, the circuit is probably affected significantly. If one of your 120 ohm resistors fails (and nothing else does) then the 20 ohm effective resistance increases to 25 ohms, not an open circuit. Of course the chance of a single component failing and not causing general ...


16

This is a mounting hole for a screw. Smaller holes around - Vias are used to reinforce mounting point. Copper ring around the hole together with plating increases stiffness of PCB. Vias around protect this ring from being peeled-off by screw head. Another purpose of Vias might be to increase electrical or thermal conductivity between PCB layers and the screw....


5

This is a mounting hole where a screw can go through, to attach the circuit board to some kind of enclosure. The screw may or may not be connected to the circuit's ground.


0

Using the Hertz/volt tuning_factor of the PLL (you may have to assume a number, such as 100MHz/volt), and any nearby interferers, build an interference model. Establish your tolerance for deterministic jitter, such as what external Black Bricks will induce into your PLL control loop. Establish an ERROR BUDGET for phase noise (timing jitter).


4

For typical component sizes, E12 vs E96 or the selection of 5% or 1% components makes very little difference, since the cost of placement is much more significant than the cost of the resistor. However, while a 4000-part reel of resistors up to 1206 costs a few USD, prices go up very rapidly for larger components, although the performance does not. Using ...


1

2 things you need to modify on the board. You have used 1 source pin of MOSFET as VSSA of MOSFET driver and others for connecting to lower MOSFET while you should short these two source pin of one MOSFET together externally. use 22uf and 0.1uf capacitor in parallel as a bootstrap capacitor.


8

Parallel resistors, greatly imbalanced in value, can be for trimming. If 1% at 1,000 ohms, then 1MegOhm in parallel will reduce the total by 0.1%. Parallel resistors will have a greater area, thus more vulnerable to electric field aggressor flux inflows. Parallel resistors may have more underlying Planes, to which HEAT CAN BE DUMPED through the insulating ...


23

Let's have a look at the pcb... It looks like they used several resistors for higher power dissipation. This is quite common, as several low power resistors may be cheaper than one high power resistor, especially if you already use the value somewhere else in the design, which means you already have them loaded on the pick and place machine so you don't ...


52

Power dissipation will be the driver. Using six in parallel allows use of standard resistors which may be a stock item. Using standard parts allows use of automatic assembly equipment. Lower profile. Heat spread out over larger area resulting in lower peak temperatures. Ability to combine to make a non standard value. The 20 Ω in your question is not an E12 ...


0

The RFI filter seems mechanically configured, to fit into a metal bulkhead. Thus the metal bulkhead serves as excellent shield between input and output wires. Whereas the EMI filter is intended to be installed on a metal plate (notice that mounting tab on the case), with input wiring and output wiring (in the power lines) able to couple to each other by ...


1

If there are higher frequency signal components (including fast rise times on otherwise lower frequency digital signals) then the primary concern with current loops is EMI, as well as EMC depending on the sensitivity and noise margin of our inputs regardless of the frequencies on our board (what we may radiate from the board or what we may pick up from ...


4

The way I would approach this problem is asking myself, "What is the max current on the PCB ground before the ADC would 'see' the voltage?". In other words, what is the lowest common mode voltage generated by the ground before the ADC is affected. For a 16-bit measurement 76uV represents 1 bit for a 5V range on the ADC, so let's look at how much ...


1

Let's Discuss Step by Step, 1. Circuit Diagram For any Buck or Boost converter use few Bulk capacitors in parallel to reduce ESR. Use Decoupling MLCC or PF capacitor parallel to Bulk Capacitors. In P3 connector use the remaining pin as GND. 2. PCB Layout Never use the steep bend of any data or power line. Try to minimize High current loops. Use Ground ...


1

Can you program the same chip outside the board? I hope you have put the chip in a DIP socket. Doesn't apply to SMD though. In that case make sure the chip itself isn't faulty. Although rarely, but sometimes it so happens that the chip is configured to expect a crystal oscillator at the XTAL pins. try providing that and see if it runs.


1

First off, get Electromagnetic Compatibility Engineering by Henry W. Ott and read most of it. Secondly there are no hard/fast rules when it comes to EMC engineering, it's more of an art, and the best way to answer questions is to build and test (you'll need some equipment like an RF generator or a spectrum analyzer, it also helps to have access to a lab with ...


1

In this circuit the role of decoupling caps is to reduce power supply impedance. A transistor wired as an emitter follower, as is the case here, can turn into an involuntary Clapp/Colpitts oscillator when collector impedance is inductive enough (due to long traces to the nearest decoupling cap) and layout parasitics (inductance/capacitance/coupling) adds ...


0

This is an audio output with estimated 1A hard limit (BD139 max current). The decoupling caps aren't avoiding oscillation with long cables. Instead they provide surge currents for transients. Electrolyte caps 100µ aren't fast enough for 10kHz and beyond if they're not low ESR types (equivalent series resistance). For audio projects it is sufficient to add a ...


2

The longer the cable to load is, the more it will have capacitive load, so the placement of decoupling cap is even more important, to allow driving the capacitive load better.


0

It depends on what else is supplied by the LDO. If it's the only ic or if there are only two others, non greedy ones, then it's ok. However if you have more ic's and stuffs taking current, switching on and off and speed is important, than I would add a 1uF next to the 0.1uF between the LDO and the ic next to it.


0

Just to compliment Andy aka This is a combination of copper pour and also solder mask. In KiCAD such area's are known as filled zones but they fulfil the same function - means to designate an area to be flooded with copper A filled zone on its own however will be covered with resist, if it is on one of the two outer layers. In conjunction with the mask, ...


2

More than likely you will create this using a copper pour function. You draw a shape, place the shape on the appropriate layer and attach to it a net name (the signal name of the track it is replacing). Then OrCAD will fill in the copper inside the shape. You can also use the copper-fill feature in OrCAD (if I remember the name properly). The difference ...


2

If the "H" region is electrically isolated (at ground potential, or not connected to any voltage), then use several vias to connect it to an underlying (opposite side) GROUND PLANE to dump the heat. A via with 1:1 ratio of periphery_to_height has 70 degree C per watt Thermal Resistance, using standard PCB foil (1.4 mils thick, or 35 microns, 1 ...


1

If the LED will be fully on, at full capacity all the time, then I strongly recommend extending the thermal pads to the sides and add a heatsink. The thermal pad starts below the led and can extended left and right toward small copper areas 10x10mm for example. These copper areas should not be covered with solder mask. You should also add thermal vias ...


1

You have essentially 3 pads in the suggested footprint which are soldered to the LED: an upper, a lower, and an H-shaped middle. The upper and lower are actually the electrical connection points to the LED, and MUST be connected to the power supply. They also conduct heat away from the LED. The middle pad is thermal only, and can be left floating. As for ...


10

What would happen if i pour ground copper at that area as well. The PCB legend implies it's good for 1 GHz. At 1 GHz a 1 pF capacitor has an impedance of 159 ohms. Do you really want to spoil the lack of capacitance at the probing end of the circuit with extra capacitance to ground circa +100 ohms on each input line (because of extending the ground plane)? ...


Top 50 recent answers are included