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Understanding The Gate Of A MOSFET MOSFETs are remarkable devices which provide many benefits when driving various loads. The fact that they are voltage driven and that, when on, they have very low resistances make them the device of choice for many applications. However, how the gate actually works is probably one of the least understood characteristics ...


18

If you selected this driver, which has huge output current (7A) then I presume you need this gate drive current to switch a very large FET very fast. The gate resistor will only slow things down by reducing gate drive current, so its optimum value is zero ohms. Its maximum value depends on acceptable switching losses (switching slower causes more switching ...


17

First off, the rules of the site do state not to ask for recommendations of products, so I will skip that bit. Just read the datasheets as everything will be explained in there. If there is something on a datasheet you do not understand, please post a separate question about it. Now, on to your problem. From what I think you are trying to do, you may find ...


15

The trouble with using a high side P channel MOSFET driven from a signal that doesn't get close (less than 0.5 volts) to the high side voltage is that there is a decent probability that it will appear to be still active when you believe you have it turned off. However, with some care you can put a zener diode in series with your 3.3 volt GPIO drive voltage ...


11

Here is another approach that uses an N-MOSFET in a level shifter configuration that does not invert the control signal polarity. simulate this circuit – Schematic created using CircuitLab You need to chose MOSFETs with under 1V gate thresholds, M1 needs to be low Rds-ON. M2 can be a small signal device.


8

The MOSFET is acting as a source follower and this generally means that whatever signal is placed on the gate, is also seen on the source AND it is quite resiliant to ripple or movements on the drain. So the source is the output and the gate is at DC level of 82% of the drain voltage BUT it's filtered (by R1 and C1) to remove any ripple seen on the drain. ...


8

Per datasheet, maximum junction temperature is 175C. (Tj max) Per datasheet, thermal resistance, junction to case is 0.18 K/W. (Rthjc) You would like to dissipate up to around 370W, I guess. That must be a decent high-discharge cell to put out that much power. Let's just round it up to 400W. So the maximum case temperature you can allow is: 175 - 0.18 * ...


8

There is no way for your MOSFET to turn off. Figure 1. Move R39. The problem is that when the opto turns on Q1's gate capacitance is charged up. When the opto turns off there is no discharge path. If the gate voltage gradually leaks away Q1 will gradually turn off resulting in substantial current through it while there is substantial voltage across it so ...


8

Provided you respect its safe operating area and thermal limitations, the IGBT itself will have no trouble with 100% duty cycle. The gate driver will need some attention. Some types of gate drive circuits or ICs aren't going to be compatible with 100% duty cycle, e.g. those using gate drive transformers or certain types of "bootstrap" power supply. But ...


8

You are misreading the graph. The horizontal axis is the drain to source voltage -- the voltage drop across the MOSFET along the high-current path. It is not the gate to source voltage -- the control voltage. You can think of the graph as showing the safe upper limit on the power lost due to the MOSFET's on resistance. It tells you that you should be ...


8

It's called a wettable flank to make the soldered joint easier to inspect. If part of the pad reaches the side, a correctly soldered joint with enough paste that reflows correctly will develop a little fillet on the exposed side. See figure 5 for "side wall plated": https://www.st.com/resource/en/technical_note/dm00298756-leadless-packages-with-...


7

I think you will need to rethink the idea somewhat if you are using the MOSFETs to limit current because, potentially, the load might be a short circuit and all the 16.4 volts would appear across the MOSFET. Firstly the BUK9575 safe operating area: - I have positioned a red dot to indicate where 20 amps and 16.4 volts will be on the SOA graph and clearly, ...


7

V2 and the HCPL-316J don't have GND connection. See picture below. You should better start cleaning up the schematic first. Use nodes. Remove all wired connection to GND and replace them by short connection to the GND node. Cut the traces of the voltage sources V1, V2, etc. Give their positive terminal a node and use these nodes to make short connections ...


7

You need to prevent back emfs from the washer motor destroying your MOSFET when it deactivates. The normal method is a "reverse" diode in parallel with the motor such as this (equally needed for a BJT as a MOSFET): - This suggestion is made assuming that the motor is never operated in reverse - if it is then a slightly different arrangement is ...


6

Not just SiC. All high-voltage MOSFETs. There's no point due to how they are or would be used. SiC is for high voltage and the max gate-source voltage is the limiting factor when using a PMOS high-side switch to simplify gate drive. 30V is pushing it, let alone 600V. So for high-side, high-voltage switches you need gate circuitry anyways no matter what you ...


5

This looks like a mess waiting to catch fire or electrocute someone. You don't say where this is, but almost certainly some part of the AC line is tied to ground somewhere. That means you have a hidden conduction path from somewhere in the "AC Supply" block to the source of both FETs. The only way the concept is valid is if this "AC Supply" block is a ...


5

A simplified way to model/look at the gate of an NMOS can be this: simulate this circuit – Schematic created using CircuitLab There will be a series resistance Rs There will be a parallel resistance Rp There will be the gate capacitance Cgate Although not so clear from your question I think you are asking about Rs, the series resistance. Asking ...


5

This device is totally unsuited to your “linear” application and is failing due to the “spirito” effect documented by Paolo Spirito several years ago. If you read the data sheet you will see that its application is as a switching converter and that is the first clue meaning that this type of device is expecting to be driven at high gate-source voltages where ...


5

Most of the heat is conducted out through the lead frame. Typically the drain connection has the most direct connection (thermally) with the lead frame, so having multiple pins to conduct the heat out to the PCB is optimal. Sometimes the gate and source are connected to the other pins with bonding wires (perhaps many in parallel in the case of the source, ...


5

Your problem is that you are using all N-channel MOSFETs. The high side ones are being driven by +12 so they act as source followers and drop several volts. Q2 and Q4 are the ones in question. In order to avoid that, either drive them from higher voltage than 12V and add circuitry to make sure the +/-20V Vgs(max) is never exceeded, or use P-channel MOSFETs ...


5

Your output cap is reverse polarity. It's a PMOS so it's required state is inverted relative to the output of the IC. If it were an NMOS requires a high-side floating drive instead. MOSFETs require actively pulling it LO or shorting the gate to source to turn off. Simply disconnecting the drive signal leaves the gate-source capacitance charged thus leaving ...


5

Safe Operating Area (SOA) limitations could apply during the switching operation. While it is switching the current from the inductive load continues to flow through the MOSFET as it tries to turn off, meanwhile as Vds increases, it is "fighting" the gate driver trying to suck gate charge out of the part via Miller capacitance. It may take several ...


5

Can SiC SoA rating be extrapolated for faster pulse widths? No it can't. I've recently fallen foul of this using a Genesic 1200 volt SiC MOSFET and, well, darn me, but the device failed and I had to eat humble pie and recognize that I had done what you might be thinking of doing. I don't make many mistakes and, the unit was a prototype (so no great loss) ...


4

If you look in the datasheet, you'll find a timed temperature profile (or a link to where that information is available on the manufacturer's web site) for machine soldering. The temperatures will go above 175C, and for many seconds. The effects of this one time thermal abuse have been built into the specifications for the device, it has been designed to ...


4

M1/IC1 form the latching power switch. It draws no power when off, and little when on. simulate this circuit – Schematic created using CircuitLab The TLV431 (not the right symbol, this was close) is designed as a 3 terminal shunt regulator, that maintains the sense voltage at 1.24v. You could think of it as a high gain NPN transistor, with a 1.24v ...


4

Voltage is always specified with respect to a reference. Often that is ground, but there's no such thing as an absolute voltage without a reference. So your FET is specified with an abs max gate voltage with respect to the source. If the source is at 400V you can put the gate at 420V. If the source is grounded, you can't exceed 20V on the gate. To get ...


4

It is likely that R19 will fail open circuit. It is rare but not impossible for a film resistor failure to result in a short. I've never seen it happen. Consider using an appropriately rated resettable fuse in place of R19. Predicting the damage to the PCB foil is hard to do. I've seen 35um (1oz) foil pads apparently survive thermal destruction of a ...


4

A good way to mechanically kill a Peltier is to switch it on and off sufficiently infrequently that it changes temperature, anything longer than a few seconds for instance. Thermal cycling degrades them. A Peltier shifts heat proportional to the average current, but generates waste heat proportional to the current squared, so even fast PWM gives you a much ...


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