29
votes
Use cases for RAM-less microcontrollers
It is very low power.
The chip does have RAM: 32 registers that are preserved over power-down mode, which draws less than 1µA. It also has EEPROM.
You'd typically use a chip like this for data logging ...
- 12.7k
16
votes
Use cases for RAM-less microcontrollers
Such very low end microcontrollers are pretty much intended exclusively for high volume commercial consumer electronics where the price is everything and one can compromise a lot about quality and ...
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14
votes
Discrete logic design
I'm not a professional electronics engineer at all (actually just a beginner), but my few cents are that dedicated discrete logic ICs should only be used if timing is important or if it is a ...
- 14k
14
votes
Accepted
Discrete logic design
Discrete logic design won't be fully phased out. There will always be applications where using a discrete logic IC is preferable. As has been pointed out, speed is a big advantage, although in a lot ...
- 12.1k
13
votes
Use cases for RAM-less microcontrollers
The point is not about having no RAM. The point is, you can use it in any application where you need some kind of chip that does very simple things cheaply, but such an ASIC does not already exist or ...
- 164k
12
votes
Accurate quadrature decoding without external clocking
Possible XY problem?
tl, dr: yes, it's possible to make a simpler, 'accurate', non-clocked quadrature decoder, that is, one that reliably detects all the possible state transitions and infers the ...
- 55.9k
11
votes
Use cases for RAM-less microcontrollers
I've used an ATTINY10 like this, and it's low pin count and very low power.
It can't do much, it only fits 1k of FLASH, that's less than 1 thousand instructions. You can barely compile any C code for ...
- 23.5k
10
votes
Discrete logic design
If you're going to create a commercial product, you really shouldn't choose a design because "it's programmable" or because a more senior colleague proposed it. Instead you should estimate risks and ...
- 26k
9
votes
CPLD is (sometimes) not incrementing counter
Is the trigger input completely asynchronous to the 50MHz clock? If so, it probably violates the setup and hold time requirements from time to time. You need to ...
- 176k
8
votes
Can I use C language to program a CPLD/FPGA?
Generally you can. There is free SystemC for HLS(High Level Synthesis). HLS is getting more and more popular but what you have to remember is that you do not program CPLDs /FPGAs using C language, you ...
- 696
8
votes
MITM on I2C Bus
I think that attempting cutsey hacks like you have been is asking for trouble, with exactly the kind of symptoms you are running into. You are basically trying to cheat and hope you don't get caught.
...
- 314k
7
votes
Accepted
CPLD is (sometimes) not incrementing counter
Fist of all:Your trigger is coming in a-synchronous to the clock. You must first synchronize it before you can safely use it.
The code for that is:
...
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7
votes
Discrete logic design
One aspect the other answers are forgetting is safety. Discrete logic circuits are way more reliable than much more complex microcontroller designs. I helped building a hydrogen prototype car, all the ...
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7
votes
CPLD based Pierce oscillator
This CPLD has Schmitt trigger inputs so I guess this should be possible.
Actually, if it has Schmitt trigger inputs it makes it impossible. A Schmitt trigger would just about guarantee that the ...
- 46.7k
7
votes
Accepted
Accurate quadrature decoding without external clocking
The original question asks for a circuit which extracts the direction information from a pair of encoder signals (i.e. quadrature signals). The question asks that the circuit not employ clocks, nor ...
- 26.1k
7
votes
Use cases for RAM-less microcontrollers
One application is IR TV remotes. There are ASICs that are designed for this, but maybe your design has some LEDs and the ASICs don't quite do everything you want. 32 bytes of "ram" is ...
- 171
7
votes
Use cases for RAM-less microcontrollers
First off, such MCUs are almost used exclusively where assembly-only is involved. I almost never use them in combination with a C compiler.
Second, such MCUs are often used for cost-sensitive ...
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6
votes
Accepted
Can an EPROM be "refreshed" without UV erasing?
When the EPROM is erased, all the bits are typically read as ‘1’, so each byte is 0xFF.
That is the way they will tend to age, with time and high temperature or radiation.
If you don’t have access ...
6
votes
Accepted
How do you cast an integer as a time in VHDL?
multiply (or operate otherwise) by the time unit
constant t_per : time := (1 / input_frequency * 1000000000) * 1ns; (or variations thereof)
- 935
6
votes
Accepted
CPLD based Pierce oscillator
I do not recommend this approach. You may get some circuit to oscillate under some conditions but you may very well have problems with jitter, unreliable startup and off frequency operation.
You ...
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6
votes
Use cases for RAM-less microcontrollers
There isn't much qualitative difference between a microcontroller with a handful of registers and 16 bytes of "RAM", versus one with 32 registers and zero bytes of RAM. Programmable logic ...
- 47.1k
6
votes
Accepted
Why do PALs have higher speed than PLAs?
Conceptually it's the same logical structure — an array of AND gates followed by an array of OR gates. But the difference is in which array(s) are programmable.
PLA - both arrays are programmable
PAL ...
- 176k
5
votes
74LS161 in program counter circuit jumps clock cycles
As far as I can see, you don't have any power supply decoupling capacitors anywhere on your collection of breadboards. It's no wonder it's "touchy" and sensitive to glitches.
You should put about 100 ...
- 176k
4
votes
Accepted
Active low vs active High reset in CPLD
There are two main reason for active low
An reset active low flip flop can be implemented with one less transistor than active high.
Upon power up, It's easier to keep reset at a 0 voltage level, ...
- 8,715
4
votes
Is this the correct way putting multiple chips into one JTAG chain?
You've got a few questions there, I'll try to address them in order. First, for JTAG:
Conceptually, yes, that's correct -- JTAG is a chain / a shift-register and you've connected it as such. At a ...
- 6,416
4
votes
Accepted
What is the modern way to do small scale programmable logic?
The modern way to do such a digital logic circuit would be in an FPGA or CPLD.
The way I'd recommend for your particular logic circuit is a CPLD. Have a look at the Altera MAX10 family or the Lattic ...
- 23.7k
4
votes
Accepted
VHDL: Demultiplexing a signal to one of many outputs while driving unused outputs to '0'
The problem with your code is that an assignment of the form:
a <= (3 => '0', others => '1');
must use constants for the offsets being assigned (in this ...
- 2,027
4
votes
Can I use C language to program a CPLD/FPGA?
For FPGAs, yes. I don't think there are many tools to target CPLDs with C (although in theory it should be perfectly possible).
I may be talking heresy here, but (to me) the advantage of C-to-gates ...
- 8,539
4
votes
CPLD is (sometimes) not incrementing counter
The problem is most likely meta-stability caused by using an asynchronous signal (your input trigger) to control your counter.
When bringing any signal in, you ...
- 68.7k
4
votes
Discrete logic design
I have to admit, whenever I have to do some complex combinatorial logic plus some timers, I don't bother with discrete logic at all but always code a minimal assembler program for an ATtiny (use a PIC ...
- 14.4k
Only top scored, non community-wiki answers of a minimum length are eligible