# Tag Info

34

You're mixing up implementation technology with colloquial terms for functionality. CMOS - Complementary Metal Oxide Semiconductor - is a method of making logic and related circuitry using both N-Channel and P-Channel field effect transistors. One of its defining characteristics is extremely low static power consumption - power is almost only used when ...

16

If you look at the memory map, there are actually 524,288 bytes of ROM, which is 512K (where 'K' refers to 1024, not 1000)- btw, I got that by subtracting the start address 0xF8000 from the end address 0xFFFFFF and adding one. That's 4M (where 'M' is 1024 * 1024 = 1,048,576, not $10^6$ = 1,000,000). It's usually pretty clear what's going on from ...

16

The datasheet should tell you how long each instruction takes, and what differences there are, if any, between executing from RAM or ROM. For microcontroller that offer the option of executing from RAM, that is probably faster, likely being the main point of using additional RAM space to execute code from. There may also be some fetch overlap issues. In ...

14

The early computer engineers chose to adopt, and adapt, SI prefix units to their data counts. These are the same prefixes, but counting using binary rather than metric. Since 2^10 is close to 10^3, then each SI prefix normally increasing an amount by 10^3 instead refers to an increase of 2^10: Prefix Metric prefix Binary prefix Difference k ...

14

When the 1MB of memory is referred to, do the books refer to the ROM and RAM of the computer. Is the ROM + RAM = 1MB of memory interfaced? Correct. The CPU does not distinguish between RAM and ROM; the 1 MB address space is shared between both. If yes, when memory mapped I/O is shown as a memory segment in this 1MB memory space.....do they mean that the ...

14

Back when the PC was first invented, most of the logic on it was power-hungry NMOS and TTL chips. CMOS was very new and the only circuits in the PC that used it were associated with things that needed to run on battery when the power was off, such as configuration RAM and the real-time clock. Nowadays, nearly all of the logic is CMOS, including the power-...

14

Rom(=Read only memory) is a brute force (=absolutely non-minimized) way to implement a combinatoric circuit. Current state bits and inputs together are address, the data stored into that address contains the next state and possible output bits which both can depend on current state and input bits. When one builds a state machine using standard parts, he ...

13

Fuse-programmable ROM is not a simple wired XY matrix, with fuses at each intersection. That wouldn't work, for the reasons you give. Typically, transistors are used at each intersection, like this. Image from here, worth visiting if you're interested in other types of ROM. Conceptually, something as simple as a diode in series with each fuse would serve ...

11

Character generator ROMs with 5x7 ASCII codes were certainly sold. One example was the Signetics 2513, a rather nasty and sluggish P-MOS chip requiring three supply rails. OTP and UV-erasable EPROMs came along not so long after- so the cost advantages of mask ROMs were not as significant as compared to mask charges (mask ROMs are not really fully custom ...

10

In context of memory capacities MB often means 1024KB (instead of 1000K). You can use MiB in order to avoid ambiguity.

9

Part selects in Verilog can use variables, as long as the width of the select is a constant. The solution here is to user a lesser-known part select syntax, where you specify the offset and the size. DATA_OUT = char_font[2*ROW_NUM+:10]; // +10 due to Big Endian The above selects 10 bits starting at bit 2*ROW_NUM Excerpt from the SystemVerilog LRM, IEEE ...

9

It depends entirely on the memory and CPU architecture. As a rule of thumb, SRAM is faster than flash, particularly on higher-speed MCUs (>100 MHz). SRAM bit cells produce a (more or less) logic-level output, while flash memory has to go through a slower current sensing process. How much faster (if any) again depends on the architecture -- the word size of ...

9

I think you are confusing two usages of the "CMOS" acronym. There are chips built entirely of the complementary MOS transistor technology. In fact almost all chips these days are built this way including much of the digital control circuitry on a Flash chip. The other usage of CMOS has persisted in the PC industry since the earliest days to refer to the ...

8

So it depends on what you want to do. As a general rule: if you're willing to run slowly enough, you can do whatever the heck you want. On microcontrollers (like a PIC or an ATMega processor (not including PIC32 or Atmel's ARM processors)) you normally have a Harvard Architecture which means that code and data are stored in different parts of memory and ...

7

The sequence of bytes is not for hiding the content from others, but to prevent accidental overwrites of data. You can accidentally write a byte to the EEPROM, but accidentally writing the three specific bytes in a row is much less likely. And no, you can't change the bytes.

7

If you don't use diodes, then the whole matrix will get shorted together and it will be impossible to read anything. Think about the following case: B0 B1 | | W0 ---X--X-- | | W1 ---X--+-- In this case, X represents either a diode or a wire connection and + represents a crossing with no connection. If you use diodes, applying a ...

7

First, download 8086 datasheet for reference. When the 1MB of memory is referred to, do the books refer to the ROM and RAM of the computer. They refer to the addressable space of the microprocessor. Look into datasheet, it shows A19:A16 and AD15:AD0 lines which are used for addressing outer space during T1 cycle. CPU does not care what is there in the ...

6

Production programmers generally have an option to serialize the image written to the memory: each individual product is flashed with data that is different, for instance by incrementing a specific data word, but more complex operations are also possible. Another option is to buy a chip that itself has a unqiue number. This is for instance done for Ethernet ...

6

The way you describe is a valid one, at least it's one we use in our projects. First we flash the whole program which contains an initial set of values, so the program will run fine. During calibration the serial number (UUID) of the device will be set, along with the other calibration factors. For this we reserve a flash page at the end of the flash, so an ...

6

Diode-OR them: simulate this circuit – Schematic created using CircuitLab Either input can pull the output low, and only the pullup will pull it high.

6

Putting pipeline registers at the inputs and outputs of a block RAM allow it to run at the fastest possible clock speed (throughput), but the rest of your design must account for the additional clock cycles of latency before you see the results. Therefore, you must select the options in the megawizard that correspond to what your logic design actually ...

6

That is in fact the key difference between "von Neumann" and "Harvard" architectures. The first uses a single address space for everything, while the latter has separate address spaces for instructions (usually ROM) and data (usually RAM). You can get microcontrollers with either architecture. Some implement a hybrid of the two.

6

This look like a general representation of sequential logic. It could be Read Only Memory: Any boolean function or logic gates combination can be implemented as a look-up table, and look-up tables are equivalent to pages of read-only memory where the inputs are the address and the outputs are the content of the memory.

5

If the point is to hand-build it, try a diode matrix: http://www.cca.org/blog/20120222-Diode-Matrix.shtml A diode matrix is an extremely low-density form of read-only memory that was used in computers in the 50s through the 70s, before EEPROMs were invented. (They are actually still used, but only inside microchips, not using discrete diodes.) Each ...

5

No. NAND flash is unsuitable for storing code which is directly executed by a CPU. Nand flash can only be used to store code which is first copied to RAM and then executed from the RAM. There are two reasons for this: firstly NAND flash is not accessible word by word; it's accessed in blocks. Secondly, data in NAND flashes is actually quite volatile and just ...

5

Certainly. I worked as a FAE for National, who produced a range of pre-programmed ROMs. Two I remember were a sine table lookup and a 7-segment to BCD converter. It's so long ago I can't remember part numbers or details.

5

In my mind, a register is a storage location that is within the CPU, or directly addressable by the CPU - things like the Accumulator, index registers, and similar things. I would not say that EPROM, FLASH and RAM have registers. If you look at the assembly-language instruction set for a microprocessor or microcontroller, you will see that some instructions ...

5

Ask yourself how could the system work if it isn't true? In most implementations, the .data segment is for initialized data, where .bss is for data that is set to zero. You can't count on RAM being set to anything at all on power-up, so the processor has to zero out the .bss segment and initialize .data. Usually this is done by storing an image of the ...

5

There are several ways of making ROMs. The first is a true ROM, a mask ROM, where the contents are determined at the time of device manufacture. A mask ROM consists of a set of bit lines and word lines, interconnected by diodes at each crossing. An address decoder drives one word line based on the input address, and the output data appears on the read ...

5

You forgot the pull-up resistor so the FET would simply short out your power supply.

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