25
votes
Accepted
Hardware debouncing of key matrix with minimum passive components
Let's be clear about this. If you have a keypad matrix you are already using processing power to apply sequential logic voltages to the rows or columns then reading the columns or rows back in order ...
- 443k
16
votes
Can multiple Schmitt triggers in series fully debounce a switch?
Can multiple Schmitt triggers in series fully debounce a switch?
A single Schmitt trigger with a analog filter in front of it can be used for debouncing. However, after that Schmitt trigger, the ...
- 312k
16
votes
Accepted
Does the 74LVC1GU04 actually have "Schmitt-trigger action" on its input?
This is a copy-paste error. All other (buffered) parts in the 74LVC series have schmitt-trigger inputs, but the 74LVC1GU04 in particular does not. They simply forgot to delete that line from the ...
- 15.5k
14
votes
Accepted
Using CMOS Schmitt trigger inverters in quartz crystal oscillator circuit
A Schmitt trigger inverter is a bad idea for the first inverter which is driving the crystal directly. It may not even oscillate at all as shown, or oscillate at some undesired frequency. Note ...
- 312k
13
votes
Accepted
Can multiple Schmitt triggers in series fully debounce a switch?
Using Schmitt triggers in series would not further reduce bounce.
Consider the filter:
The input is (U). The red line is a 50% threshold, the output of which is seen as signal (A). It bounces each ...
- 5,112
12
votes
Can we declare Schmitt triggers to have memory? Can we call their output levels states?
Yes, "memory" in the sense of "this system is not memoryless" is any difference in behaviour that depends on previous internal or external state.
Since the exact idea of a Schmitt ...
- 90.3k
10
votes
Schmitt trigger - why is there no current over the second transistor?
DISCUSSION
I don't know if this will help you at all, but if you are reading The Art of Electronics, then you will also almost certainly read (in about 20 pages yet) about the long-tailed pair ...
- 77.4k
9
votes
Minimizing signal delay when debouncing
The best way to handle this is to debounce the signal in software with your microcontroller. This is cheap, simple, and gives you maximum versatility in terms of your debounce algorithm.
Here's an ...
- 6,603
8
votes
Accepted
A question about positive feedback resistor in a Schmitt trigger
You guys failed to recognize OP issue.
If those explanation works. He won't ask about this in the first place. (methinks)
Let's see the most simplest form of explanation
How R3 parallel with R1?
...
- 196
8
votes
Accepted
Why doesn't this schmitt PWM circuit work as expected?
I'm afraid your simulator is lying to you, by failing to take into account the actual input characteristics of the 74LS14.
According to the datasheet (Section 6.5 on page 5), note the values for IIH (...
- 170k
8
votes
How does a "speed up capacitor" work in Schmitt trigger?
The positive feedback path provides the hysteresis that makes it a Schmitt trigger. However, it also forms an RC filter between the parasitic capacitance C1 and the resistor R1||R2. It's possible ...
8
votes
Accepted
Why is my op-amp pulse generator (LF353) delivering way less voltage (±2 V) than the voltage supplies of the amplifier (±15 V)?
I'm aware that something might be wrong with my circuit but I don't
know what that is
A 100 Ω load (R4) will scupper the output signal levels for an LF353: -
The same is true for the LF353-N: -
...
- 443k
7
votes
CPLD based Pierce oscillator
This CPLD has Schmitt trigger inputs so I guess this should be possible.
Actually, if it has Schmitt trigger inputs it makes it impossible. A Schmitt trigger would just about guarantee that the ...
- 45.4k
7
votes
Accepted
Why is this derivation of Schmitt trigger circuit's output signal, incorrect?
Point 1
The Schmitt trigger has hysteresis. Hysteresis implies that the circuit has memory. It remembers it last state. For a system with memory, you cannot write \$V_o = f(V_{in})\$. It should be of ...
- 3,766
7
votes
Can we declare Schmitt triggers to have memory? Can we call their output levels states?
A latch is like the simplest form of memory. If you configure a Schmitt trigger as a latch, it is not a stretch to call it one bit of memory. But any buffer can be set up as a latch.
I guess I am ...
- 29.1k
7
votes
Accepted
Minimizing signal delay when debouncing
If you insist on a H/W solution, a diode will make the charging/discharging of the cap asymmetrical. The delay will be a few microseconds. The recovery time will be a few milliseconds.
simulate this ...
- 14.9k
7
votes
Opamp-based Schmitt trigger
The output of inverting Schmitt trigger has 180 degree phase shift when compared to non-inverting Schmitt trigger.
No, it inverts. That's not a phase shift, unless your signal is a square wave with ...
- 90.3k
7
votes
Is a Schmitt-trigger output’s rise time affected by input pulse’s rise time?
Yes, it will likely be affected somewhat. Intuitively you would expect that because at slow input change rate you are depending on the positive feedback to drive the output slew rate. For a fast input ...
- 383k
7
votes
Accepted
Schmitt trigger transistor duty cycle
1MHz may seem like a really low frequency but you'll see a lot of effect from storage time in saturated BJTs at that frequency. Here is your circuit (but with 2N3904s substituted since I don't have a ...
- 383k
6
votes
How to implement programmable Schmitt trigger?
This is a real proper way of doing it for the pedants amongst us (and that usually includes me).
Use two comparators (one for the high level threshold and one for the low level threshold). Use two ...
- 443k
6
votes
Accepted
How is a latch different from Schmitt Trigger?
They differ in the level of the signal that is required to change their state.
In a Schmidt trigger, a relatively small, well-controlled change of signal level is needed. The input is designed to ...
- 161k
6
votes
Schmitt Trigger Comparator 0 - 5V
The LM358 op-amp will not swing it's output to the positive supply rail. The top "transistor" in the package is configured as a Darlington-pair and this is your problem: -
Even if the base of Q5 ...
- 443k
6
votes
Why do TTL pulse generators generate an asymmetrical square wave (unlike CMOS)?
Two reasons. First, a TTL input is actually an output. It sources a current that must be shunted to ground to be seen as a logic 0. This current affects the charging rate of the timing capacitor, ...
- 18k
6
votes
Why do TTL pulse generators generate an asymmetrical square wave (unlike CMOS)?
CMOS Schmitt triggers have the two threshold voltages at \$\frac 1 3 V_{DD}\$ and \$\frac 2 3 V_{DD}\$. Furthemore \$V_{OH}=V_{DD}\$ and \$V_{OL}=0\$.
Since this is symmetric with respect to \$V_{DD}/...
- 5,317
6
votes
Schmitt trigger with 741 op-amp not behaving as in simulation
The National (now TI) LM741 really is not well characterized to run off of a single \$5\:\text{V}\$ supply rail. The LM741 datasheet suggests that with your loading, you are guaranteed to get within ...
- 77.4k
6
votes
Accepted
CPLD based Pierce oscillator
I do not recommend this approach. You may get some circuit to oscillate under some conditions but you may very well have problems with jitter, unreliable startup and off frequency operation.
You ...
- 57k
6
votes
Accepted
Anyway to reduce pulse trigger time width without using ne555timer
Your comparator circuit is flawed because of this: -
I've marked a red arrow showing what you have done wrong when using an op-amp with an AC signal source. You are attempting to feed in an input ...
- 443k
6
votes
Accepted
Suitable IC for 3.3 V to 5 V level conversion with a Schmitt trigger input
When powered from 5V, any HCT series logic gate has input levels compatible with 3V3 logic and 5V output levels.
74HCT14 has Schmitt trigger inputs.
74ACT is faster, has higher output current, and ...
- 71.9k
Only top scored, non community-wiki answers of a minimum length are eligible