# Tag Info

## New answers tagged signal

0

This should be the answer I was taking downward slope as positive my mistake

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I will depend on the input impedance of the inputs and the output impedance of the output. If the combined inputs have a low input impedance compared to the output, then you will need some type of buffering. Say an opamp as unity-gail followe or a simple emitter follower.

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You have to make sure that your analog output can drive more analog inputs. For example, each analog input has 10k ohm input impedance, then the current is 1mA. If you connect two devices, the analog output shall be capable to deliver more than 2mA.

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Assume there's an integrator somewhere in the system, so that $G_1(s)G_2(s)H(s)=\large\frac{A(s)}{sB(s)}$ where $A(s)$ and $B(s)$ are polynomials without a free $s$ term. Now Set $\small R(s)=0$, and work out the CLTF: $G(s)=\frac{C(s)}{D(s)}=\frac{sB(s)}{A(s)+sB(s)}$. The DC gain is found by setting $s=0$, thus $G(0)=0$. This means that ...

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In control systems the loop gain LG (product of all transfer functions within the closed loop) is a very important parameter. In your case, the loop gain is LG(s)=G1(s)*G2(s)*H(s). As you can see, the closed-loop transfer function for the disturbed input Hd(s)=Cd(s)/D(s)=G2(s)/[1+LG(s)] will be rather small ("almost zero" in the text) for a large loop ...

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Depends on what kind of periodic signal it is. As @Andy Aka mentioned: "Amplitude Profile" or How its amplitude changes with time (Triangular, Square or others ?). Whatever be the complex periodic wave you have (say amplitude =$V_o$ , Period = $T = 2\pi/\omega$), it can be represented as sum of fundamental frequency and its harmonics. $$V(t) = V_f(t)... 0 Note that (apart from the subscripts of x) the substitution of$$ x_2(2t-5) |_{x_2(t) = x_1(t-T)}$$is not equal to the substitution of$$ x_1(2t-5) |_{ t = t-T }$$The first substitutes $x$, the second equation substitutes $t$. You could also write for the first equation:$$ x_2(2t-5) |_{x_2(u) = x_1(u-T)}$$where $u$ is just another letter ... 2 You were given$$ x_2(t) = x_1(t-T) If you apply the transformation $t\to t-T$ to the expression $2t-5$, you get $(2t-5)-T=2t-5-T$, not $2t-5-2T$. Your expression for $y(t)$ involves multiplying the argument of $x(t)$ by 2, but that's irrelevant to the question of determining $x_2(\cdot)$ from $x_1(\cdot)$.

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simulate this circuit – Schematic created using CircuitLab Uni directional signal translator The LM339 is actually a quad comparator package I think available in DIP or SOIC. Been around since Polly was an egg

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Note: This does not satisfy the OP requirement of dynamically changing input voltages that go above and below the high side. But is a great simple bidirectional level translator for voltages that fixed. A mosfet and two resistors makes a nice bidirectional level translator. http://www.hobbytronics.co.uk/mosfet-voltage-level-converter Low Side Control ...

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A quick search yielded this, it shows how to create a binary arb file in C#. https://community.keysight.com/thread/20217

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If you take only the output from the final amplifier, then the transfer function is: At some value of input, the output stage will saturate and not increase any further. If we then add the other outputs, we will get (not to scale): As each amplifier saturates, then the slope reduces until the next amplifier in the chain saturates until all 4 amplifiers ...

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There is no conflict. There is nothing wrong with "11" as input to this circuit. The ONLY problem is that if both inputs change from "1" to "0" simultaneously (whatever that means!), you can't predict the final state of the outputs. If one changes before the other, then there's still no problem.

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There is no electrical conflict. It is a well defined state, but the conflict is only with the expected logic output because Q will not be /Q as both Q and/Q are 0.

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In general the analog signal chain (combination of passive filter networks and/or active amplifiers) feeding an ADC should have a bandwidth less (preferably significantly less) than half the sampling frequency, to avoid aliasing. Furthermore, in this type of power rail monitoring application you usually want to reject the power supply switching frequency, ...

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1) if your register is 4-bit wide, then the carry bit will be discarded. What you will achieve is not reg + 1 but (reg + 1) % 16 For example if reg = 1111 (reg = 15) then reg + 1 = (1)0000 (= 16) but the carry bit will be discarded so reg will contain 0000 (= 0 = 16 % 16) 2) I'm not sure about the synthesis, and I guess it will depend on your FPGA and ...

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The carry-out is ignored in such expressions. If you care about it, you need to account for it explicitly. For example, you could write something like this: -- perform the addition, making room for the carry-out signal sum : std_logic_vector (4 downto 0); sum <= ("0" & reg) + "00001"; -- update the register and capture the carry-out at the same time ...

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It's called a 'wavelet'. Google for that.

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I think this pattern is called "wave packet". https://en.wikipedia.org/wiki/Wave_packet

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We consider communicating across the town between buildings (1,000 meters) and across the country between high hills?? (1,000,000 meters). The bigger the antenna, the better. Lets assume Citizens Band, near 30MHz with wavelength of 10 meters, and quarterwave verticals of approximately 100 inches. This size antenna (which needs a "ground counterpoise" of ...

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There are two aspects: 1) Power transfer of the transmission Friis transmission equation - Wikipedia provides a calculation. $P_{received} = \frac{Gain_{transmis \, antenna} * Gain_{recieve \,anatenna} *\lambda^2}{(4*\pi*R)^2} *P_{transmit}$ Along with the sensitivity of the receiver and the transmitted power you can calculate if the transmission will ...

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